集成商用0.8 /spl mu/m cmos电路的三轴加速度计的制造

Proceedings IEEE Thirteenth Annual International Conference on Micro Electro Mechanical Systems (Cat. No.00CH36308) Pub Date : 2000-01-23 DOI:10.1109/MEMSYS.2000.838617

H. Takao, H. Fukumoto, M. Ishida

{"title":"集成商用0.8 /spl mu/m cmos电路的三轴加速度计的制造","authors":"H. Takao, H. Fukumoto, M. Ishida","doi":"10.1109/MEMSYS.2000.838617","DOIUrl":null,"url":null,"abstract":"In the present study, a fabrication technology of bulk-micromachined three-axis accelerometer integrated with commercial CMOS circuits has been investigated for low cost realization and improvement of device performance. The key technologies in the developed fabrication technology are wafer thickness control, backside polishing with chemical spin etching and anisotropic etching with PVD SiO/sub 2/ mask. The signal processing circuits were fabricated with a commercial 0.8 /spl mu/m-CMOS technology, and all the micromachining processes were performed to complete CMOS wafers. Characteristics of the devices and reliability for the repetitive vibration load were evaluated. As a result, basic performance of the accelerometers with this technology was confirmed.","PeriodicalId":251857,"journal":{"name":"Proceedings IEEE Thirteenth Annual International Conference on Micro Electro Mechanical Systems (Cat. No.00CH36308)","volume":"235 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-01-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Fabrication of a three-axis accelerometer integrated with commercial 0.8 /spl mu/m-CMOS circuits\",\"authors\":\"H. Takao, H. Fukumoto, M. Ishida\",\"doi\":\"10.1109/MEMSYS.2000.838617\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the present study, a fabrication technology of bulk-micromachined three-axis accelerometer integrated with commercial CMOS circuits has been investigated for low cost realization and improvement of device performance. The key technologies in the developed fabrication technology are wafer thickness control, backside polishing with chemical spin etching and anisotropic etching with PVD SiO/sub 2/ mask. The signal processing circuits were fabricated with a commercial 0.8 /spl mu/m-CMOS technology, and all the micromachining processes were performed to complete CMOS wafers. Characteristics of the devices and reliability for the repetitive vibration load were evaluated. As a result, basic performance of the accelerometers with this technology was confirmed.\",\"PeriodicalId\":251857,\"journal\":{\"name\":\"Proceedings IEEE Thirteenth Annual International Conference on Micro Electro Mechanical Systems (Cat. No.00CH36308)\",\"volume\":\"235 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-01-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings IEEE Thirteenth Annual International Conference on Micro Electro Mechanical Systems (Cat. No.00CH36308)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MEMSYS.2000.838617\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings IEEE Thirteenth Annual International Conference on Micro Electro Mechanical Systems (Cat. No.00CH36308)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MEMSYS.2000.838617","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 9

摘要

为了实现低成本和提高器件性能，本文研究了一种集成商用CMOS电路的体积微加工三轴加速度计的制造技术。该工艺的关键技术是晶圆厚度控制、化学自旋刻蚀抛光和PVD SiO/ sub2 /掩膜各向异性刻蚀。信号处理电路采用商用0.8 /spl mu/m CMOS工艺制作，并完成所有微加工工艺以完成CMOS晶圆。评估了设备的特性和重复振动载荷下的可靠性。结果证实了采用该技术的加速度计的基本性能。

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Fabrication of a three-axis accelerometer integrated with commercial 0.8 /spl mu/m-CMOS circuits

In the present study, a fabrication technology of bulk-micromachined three-axis accelerometer integrated with commercial CMOS circuits has been investigated for low cost realization and improvement of device performance. The key technologies in the developed fabrication technology are wafer thickness control, backside polishing with chemical spin etching and anisotropic etching with PVD SiO/sub 2/ mask. The signal processing circuits were fabricated with a commercial 0.8 /spl mu/m-CMOS technology, and all the micromachining processes were performed to complete CMOS wafers. Characteristics of the devices and reliability for the repetitive vibration load were evaluated. As a result, basic performance of the accelerometers with this technology was confirmed.

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Proceedings IEEE Thirteenth Annual International Conference on Micro Electro Mechanical Systems (Cat. No.00CH36308)

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