{"title":"采用SIMOX介质隔离的50v智能电源工艺","authors":"J. Weyers, H. Vogt","doi":"10.1109/IEDM.1992.307347","DOIUrl":null,"url":null,"abstract":"A new process has been developed which provides dielectrically isolated power and low voltage devices by means of rather standard VLSI CMOS technology. Isolation is obtained by SIMOX and trenches. For Smart Power applications this process allows the manufacturing of 50 V vertical DMOS transistors (VDMOS) together with 50 V dielectrically isolated quasivertical DMOS transistors (QVDMOS). For control circuit design CMOS, high voltage PMOS transistors (HVPMOS), NPN transistors, JFETs, Zener and Schottky diodes are available on the same chip. Thus, the designer has at hand a wide range of devices which allows an optimum solution for many circuit applications.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"67 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"A 50 V smart power process with dielectric isolation by SIMOX\",\"authors\":\"J. Weyers, H. Vogt\",\"doi\":\"10.1109/IEDM.1992.307347\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new process has been developed which provides dielectrically isolated power and low voltage devices by means of rather standard VLSI CMOS technology. Isolation is obtained by SIMOX and trenches. For Smart Power applications this process allows the manufacturing of 50 V vertical DMOS transistors (VDMOS) together with 50 V dielectrically isolated quasivertical DMOS transistors (QVDMOS). For control circuit design CMOS, high voltage PMOS transistors (HVPMOS), NPN transistors, JFETs, Zener and Schottky diodes are available on the same chip. Thus, the designer has at hand a wide range of devices which allows an optimum solution for many circuit applications.<<ETX>>\",\"PeriodicalId\":287098,\"journal\":{\"name\":\"1992 International Technical Digest on Electron Devices Meeting\",\"volume\":\"67 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1992 International Technical Digest on Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.1992.307347\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1992 International Technical Digest on Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1992.307347","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 50 V smart power process with dielectric isolation by SIMOX
A new process has been developed which provides dielectrically isolated power and low voltage devices by means of rather standard VLSI CMOS technology. Isolation is obtained by SIMOX and trenches. For Smart Power applications this process allows the manufacturing of 50 V vertical DMOS transistors (VDMOS) together with 50 V dielectrically isolated quasivertical DMOS transistors (QVDMOS). For control circuit design CMOS, high voltage PMOS transistors (HVPMOS), NPN transistors, JFETs, Zener and Schottky diodes are available on the same chip. Thus, the designer has at hand a wide range of devices which allows an optimum solution for many circuit applications.<>