Deep insight into process-induced pre-existing traps and PBTI stress-induced trap generations in high-k gate dielectrics through systematic RTN characterizations and ab initio calculations

In this work, aiming at comprehensive understandings on pre-existing traps and stress-induced trap generations, HfSiON and HfLaSiON nFETs are comparatively studied by using the constant bias random telegraph noise (cRTN) and the transient RTN (tRTN) characterizations. With La incorporation, low frequency noise is suppressed due to lower deep trap densities while BTI degrades due to shallow traps increasing. More importantly, it is experimentally observed for the first time that PBTI stress will generate deep traps dramatically while shallow traps partly lost simultaneously. Based on the first-principles calculations, underlying mechanisms are discussed and a new model is proposed for PBTI in high-k gate stack nFETs.