K. Cheng, A. Khakifirooz, P. Kulkarni, S. Ponoth, J. Kuss, L. Edge, A. Kimball, S. Kanakasabapathy, S. Schmitz, A. Reznicek, T. Adam, H. He, S. Mehta, A. Upham, S. Seo, J. Herman, R. Johnson, Y. Zhu, P. Jamison, B. Haran, Z. Zhu, S. Fan, H. Bu, D. Sadana, P. Kozłowski, J. O’Neill, B. Doris, G. Shahidi
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Extremely thin SOI (ETSOI) technology: Past, present, and future
As the mainstream bulk devices face formidable challenges to scale beyond 20nm node, there is an increasingly renewed interest in fully depleted devices for continued CMOS scaling. In this paper, we provide an overview of extremely thin SOI (ETSOI), a viable fully depleted device architecture for future technology. Barriers that prevented ETSOI becoming a mainstream technology in the past are specified and solutions to overcome those barriers are provided.