延迟测试扫描锁存器设计

Proceedings International Test Conference 1997 Pub Date : 1997-11-01 DOI:10.1109/TEST.1997.639650

J. Savir

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引用次数: 32

摘要

本文介绍了三种移位寄存器锁存器的新设计，它们适合于分布式自检和延迟测试。这些新srl的优点是测试向量的应用速度更快，直流和交流故障覆盖率更高，性能影响较小。详细研究了操作、成本和其他属性。报道了在三种试验芯片上采用其中一种srl的结果。

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Scan latch design for delay test

This paper describes three new designs of a shift register latch that lend themselves to distributed self-test and delay test. The advantages of these new SRLs are faster application of test vectors, higher DC and AC fault coverages, with low performance impact. Operation, cost, and other attributes are studied in detail. Results of adopting one of the new SRLs are reported on three pilot chips.

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Proceedings International Test Conference 1997

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