RF CMOS的未来展望和缩小路线图

1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325) Pub Date : 1999-06-17 DOI:10.1109/VLSIC.1999.797271

E. Morifuji, H. Momose, T. Ohguro, T. Yoshitomi, H. Kimijima, Fumiyoshi Matsuoka, M. Kinugawa, Y. Katsumata, Hiroshi Iwai

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引用次数: 102

摘要

基于仿真和实验，从f/sub T/、f/sub max/、RF噪声、线性度和匹配特性等方面对RF CMOS技术的未来缩小概念进行了研究。栅极宽度和指长是关键参数，特别是在小于100 nm的栅极长度世代中。

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Future perspective and scaling down roadmap for RF CMOS

The concept of future scaling-down for RF CMOS technology has been investigated in terms of f/sub T/, f/sub max/, RF noise, linearity, and matching characteristics, based on simulation and experiments. It has been found that gate width and finger length are key parameters, especially in sub-100 nm gate length generations.

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1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325)

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