{"title":"带相位补偿可变衰减器的60ghz可变增益放大器","authors":"G. Park, Jae Kwang Kwon, D. Kang, C. Park","doi":"10.1109/SiRF51851.2021.9383343","DOIUrl":null,"url":null,"abstract":"A 60-GHz variable-gain amplifier with a phase-compensated variable attenuator is proposed herein. The proposed circuit comprises a four-stage common-source amplifier and a phase-compensated attenuator. The proposed circuit is implemented using a 65-nm CMOS process and occupies 360 μm × 765 μm including pads. The measured peak gain is 15.2 dB, and the 3-dB bandwidth exceeds 17.5 GHz from 49.5 to over 67 GHz. In addition, the proposed circuit achieves a gain control range exceeding 14.7 dB within a 3-dB bandwidth. Owing to the proposed phase compensation technique, the phase-compensated attenuator exhibits a maximum phase error of 2.9° and a RMS phase error of 1.7° at 56 GHz while consuming only 11.8 mW of DC power.","PeriodicalId":166842,"journal":{"name":"2021 IEEE 20th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"197 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-01-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A 60-GHz Variable Gain Amplifier with Phase-compensated Variable Attenuator\",\"authors\":\"G. Park, Jae Kwang Kwon, D. Kang, C. Park\",\"doi\":\"10.1109/SiRF51851.2021.9383343\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 60-GHz variable-gain amplifier with a phase-compensated variable attenuator is proposed herein. The proposed circuit comprises a four-stage common-source amplifier and a phase-compensated attenuator. The proposed circuit is implemented using a 65-nm CMOS process and occupies 360 μm × 765 μm including pads. The measured peak gain is 15.2 dB, and the 3-dB bandwidth exceeds 17.5 GHz from 49.5 to over 67 GHz. In addition, the proposed circuit achieves a gain control range exceeding 14.7 dB within a 3-dB bandwidth. Owing to the proposed phase compensation technique, the phase-compensated attenuator exhibits a maximum phase error of 2.9° and a RMS phase error of 1.7° at 56 GHz while consuming only 11.8 mW of DC power.\",\"PeriodicalId\":166842,\"journal\":{\"name\":\"2021 IEEE 20th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)\",\"volume\":\"197 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-01-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE 20th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SiRF51851.2021.9383343\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 20th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SiRF51851.2021.9383343","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 60-GHz Variable Gain Amplifier with Phase-compensated Variable Attenuator
A 60-GHz variable-gain amplifier with a phase-compensated variable attenuator is proposed herein. The proposed circuit comprises a four-stage common-source amplifier and a phase-compensated attenuator. The proposed circuit is implemented using a 65-nm CMOS process and occupies 360 μm × 765 μm including pads. The measured peak gain is 15.2 dB, and the 3-dB bandwidth exceeds 17.5 GHz from 49.5 to over 67 GHz. In addition, the proposed circuit achieves a gain control range exceeding 14.7 dB within a 3-dB bandwidth. Owing to the proposed phase compensation technique, the phase-compensated attenuator exhibits a maximum phase error of 2.9° and a RMS phase error of 1.7° at 56 GHz while consuming only 11.8 mW of DC power.