源/漏侧壁隔层工艺对硼超浅结影响的模拟

International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003. Pub Date : 2003-09-29 DOI:10.1109/SISPAD.2003.1233661

S. Chakravarthi, P. Kohli, P. Chidambaram, H. Bu, A. Jain, B. Hornung, C. Machala

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引用次数: 7

摘要

建立了一个新的模型来解释源/漏侧壁隔层过程对硼漏扩展形成的影响。建立了氢在源/漏侧壁隔离器中的扩散模型，并将其与硼在氧化物中的扩散模型相结合。该模型首先用核反应分析(NRA)的氢向外扩散数据进行校准，然后用次级离子质谱(SIMS)的硼扩散数据进行校准。该模型解释了硼结深度随侧壁间隔层沉积条件变化而出现的看似异常的变化。将该模型应用于TCAD过程/器件仿真，以了解侧壁隔离器对CMOS器件性能的影响。

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Modeling the effect of source/drain sidewall spacer process on boron ultra shallow junctions

A novel model is developed to explain the effect of the source/drain sidewall spacer process on boron drain extension formation. A diffusion model for hydrogen in the source/drain sidewall spacer is developed and combined with a model for boron diffusion in oxides. The model is first calibrated to hydrogen out-diffusion data from Nuclear Reaction Analysis (NRA) and then to boron diffusion data from Secondary Ion Mass Spectroscopy (SIMS). Seemingly anomalous changes in boron junction depths with variation in sidewall spacer deposition conditions are explained by this model. The model is applied to TCAD process/device simulations to understand the effect of sidewall spacer on CMOS device performance.

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International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.

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