基于schmitt触发器的d触发器设计在16纳米体FinFET CMOS工艺中的SE性能

2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-04-17 DOI:10.1109/IRPS.2016.7574517

H. Jiang, H. Zhang, D. Ball, L. Massengill, B. Bhuva, T. Assis, B. Narasimham

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引用次数: 6

摘要

提出了一种采用施密特触发电路的强化触发器(FF)设计，以提高软误差(SE)性能。采用α粒子、重离子、质子和中子测试了基于schmitt -trigger的DFF (STDFF)设计以及在16纳米体FinFET CMOS工艺中的传统DFF。与传统DFF相比，STDFF设计在标称电源电压和室温下的α SE截面提高了~162倍，重离子SE截面提高了~30倍，质子和中子的时间失效(FIT)率提高了~5倍。在频率(最高1.3 GHz)和温度(最高125°C)范围内，STDFF的SE截面也优于DFF。

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SE performance of a Schmitt-trigger-based D-flip-flop design in a 16-nm bulk FinFET CMOS process

A hardened flip-flop (FF) design using Schmitt-trigger circuits for improved soft-error (SE) performance is presented. The Schmitt-trigger-based DFF (STDFF) design along with conventional DFF in a 16-nm bulk FinFET CMOS process were tested using alpha particles, heavy-ions, proton, and neutron. The STDFF design shows ~162× improvement in the alpha SE cross-section, up to ~30× improvement in heavy-ion SE cross-section, and ~5× improvement in both proton and neutron failure in time (FIT) rates compared with conventional DFF at nominal supply voltage and room temperature. STDFF also outperformed DFF for SE cross-section over frequency (up to 1.3 GHz) and temperature (up to 125 °C) ranges of interest.

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2016 IEEE International Reliability Physics Symposium (IRPS)

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