Kourosh M. Kalayeh, Natalie Hernandez, C. Hillman, N. Blattau
{"title":"利用有限元模拟自动识别复杂PCB设计中存在分离风险的微通孔堆","authors":"Kourosh M. Kalayeh, Natalie Hernandez, C. Hillman, N. Blattau","doi":"10.1109/eurosime.2019.8724519","DOIUrl":null,"url":null,"abstract":"The electronic industry recently experienced a sudden increase in microvia failures in printed circuit boards during the reflow process. The failures occurred specifically on triple-stack microvias placed over a buried via. The failure mechanisms included separation of the microvia from the capture pad and ductile tearing of the copper flanges. The sudden onset of these failures was due to the electronics industry’s over-reliance on design rules to avoid PCB issues. The flaw in design rules is their reliance on lessons learned from previous designs and the assumption that new designs are sufficiently similar to older designs. This pervasive failure mode across multiple industries and designs is evidence that a new, more robust technique based on reliability physics is required for future, high density electronic hardware designs. We propose a technique that takes advantage of finite element modeling and industry research to predict the reliability and manufacturability of microvias.","PeriodicalId":357224,"journal":{"name":"2019 20th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Automated Method Using Finite Element Simulation to Identify Microvia Stacks at Risk of Separation in Complex PCB Designs\",\"authors\":\"Kourosh M. Kalayeh, Natalie Hernandez, C. Hillman, N. Blattau\",\"doi\":\"10.1109/eurosime.2019.8724519\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The electronic industry recently experienced a sudden increase in microvia failures in printed circuit boards during the reflow process. The failures occurred specifically on triple-stack microvias placed over a buried via. The failure mechanisms included separation of the microvia from the capture pad and ductile tearing of the copper flanges. The sudden onset of these failures was due to the electronics industry’s over-reliance on design rules to avoid PCB issues. The flaw in design rules is their reliance on lessons learned from previous designs and the assumption that new designs are sufficiently similar to older designs. This pervasive failure mode across multiple industries and designs is evidence that a new, more robust technique based on reliability physics is required for future, high density electronic hardware designs. We propose a technique that takes advantage of finite element modeling and industry research to predict the reliability and manufacturability of microvias.\",\"PeriodicalId\":357224,\"journal\":{\"name\":\"2019 20th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 20th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/eurosime.2019.8724519\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 20th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/eurosime.2019.8724519","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Automated Method Using Finite Element Simulation to Identify Microvia Stacks at Risk of Separation in Complex PCB Designs
The electronic industry recently experienced a sudden increase in microvia failures in printed circuit boards during the reflow process. The failures occurred specifically on triple-stack microvias placed over a buried via. The failure mechanisms included separation of the microvia from the capture pad and ductile tearing of the copper flanges. The sudden onset of these failures was due to the electronics industry’s over-reliance on design rules to avoid PCB issues. The flaw in design rules is their reliance on lessons learned from previous designs and the assumption that new designs are sufficiently similar to older designs. This pervasive failure mode across multiple industries and designs is evidence that a new, more robust technique based on reliability physics is required for future, high density electronic hardware designs. We propose a technique that takes advantage of finite element modeling and industry research to predict the reliability and manufacturability of microvias.