高性能芯片设计的Delta-I噪声避免方法[CMOS微处理器]

Electrical Performance of Electronic Packaging Pub Date : 1997-10-27 DOI:10.1109/EPEP.1997.634030

M. Cases, B. Singh, H. Smith

{"title":"高性能芯片设计的Delta-I噪声避免方法[CMOS微处理器]","authors":"M. Cases, B. Singh, H. Smith","doi":"10.1109/EPEP.1997.634030","DOIUrl":null,"url":null,"abstract":"A methodology which controls induced di/dt noise for high performance chip designs is described. Delta-I modeling and analysis for the chip, module and card is used to define a strategy and effectiveness of various decoupling schemes over a broad frequency range.","PeriodicalId":220951,"journal":{"name":"Electrical Performance of Electronic Packaging","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Delta-I noise avoidance methodology for high performance chip designs [CMOS microprocessors]\",\"authors\":\"M. Cases, B. Singh, H. Smith\",\"doi\":\"10.1109/EPEP.1997.634030\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A methodology which controls induced di/dt noise for high performance chip designs is described. Delta-I modeling and analysis for the chip, module and card is used to define a strategy and effectiveness of various decoupling schemes over a broad frequency range.\",\"PeriodicalId\":220951,\"journal\":{\"name\":\"Electrical Performance of Electronic Packaging\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-10-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electrical Performance of Electronic Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.1997.634030\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electrical Performance of Electronic Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.1997.634030","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 7

摘要

描述了一种用于高性能芯片设计的控制诱导di/dt噪声的方法。对芯片、模块和卡进行delta - 1建模和分析，用于在宽频率范围内定义各种解耦方案的策略和有效性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Delta-I noise avoidance methodology for high performance chip designs [CMOS microprocessors]

A methodology which controls induced di/dt noise for high performance chip designs is described. Delta-I modeling and analysis for the chip, module and card is used to define a strategy and effectiveness of various decoupling schemes over a broad frequency range.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Electrical Performance of Electronic Packaging

自引率

0.00%

发文量