Sangwan Kim, Peng Zheng, Kimihiko Kato, L. Rubin, T. Liu
{"title":"具有倾斜离子注入(TII)的低成本亚光刻图像化","authors":"Sangwan Kim, Peng Zheng, Kimihiko Kato, L. Rubin, T. Liu","doi":"10.1109/VLSI-TSA.2018.8403865","DOIUrl":null,"url":null,"abstract":"A sub-lithographic patterning technique using tilted-ion implantation (TII) is discussed herein, as an approach for extending Moore's Law. Its suitability for defining patterns self-aligned to pre-existing linear and non-linear hard-mask features is demonstrated experimentally. In addition, its resolution limit (< 10 nm) and line- edge roughness (LER) are investigated via experiments as well as Monte Carlo process simulations.","PeriodicalId":209993,"journal":{"name":"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"104 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Cost-efficient sub-lithographic patterning with tilted-ion implantation (TII)\",\"authors\":\"Sangwan Kim, Peng Zheng, Kimihiko Kato, L. Rubin, T. Liu\",\"doi\":\"10.1109/VLSI-TSA.2018.8403865\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A sub-lithographic patterning technique using tilted-ion implantation (TII) is discussed herein, as an approach for extending Moore's Law. Its suitability for defining patterns self-aligned to pre-existing linear and non-linear hard-mask features is demonstrated experimentally. In addition, its resolution limit (< 10 nm) and line- edge roughness (LER) are investigated via experiments as well as Monte Carlo process simulations.\",\"PeriodicalId\":209993,\"journal\":{\"name\":\"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)\",\"volume\":\"104 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSI-TSA.2018.8403865\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-TSA.2018.8403865","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Cost-efficient sub-lithographic patterning with tilted-ion implantation (TII)
A sub-lithographic patterning technique using tilted-ion implantation (TII) is discussed herein, as an approach for extending Moore's Law. Its suitability for defining patterns self-aligned to pre-existing linear and non-linear hard-mask features is demonstrated experimentally. In addition, its resolution limit (< 10 nm) and line- edge roughness (LER) are investigated via experiments as well as Monte Carlo process simulations.