CMOS技术中集成电路电缆放电事件(CDE)可靠性评估方法

Tai-Xiang Lai, M. Ker
{"title":"CMOS技术中集成电路电缆放电事件(CDE)可靠性评估方法","authors":"Tai-Xiang Lai, M. Ker","doi":"10.1109/ISQED.2006.85","DOIUrl":null,"url":null,"abstract":"Cable discharge event (CDE) has been the main cause which damages the Ethernet interface in field applications. The transmission line pulsing (TLP) system has been the most popular method to observe electric characteristics of the device under human-body-model (HEM) electrostatic discharge (ESD) stress. In this work, the long-pulse transmission line pulsing (LP-TLP) system is proposed to simulate CDE reliability of the Ethernet integrated circuits, and the results are compared with the conventional 100-ns TLP system. The experimental results have shown that the CDE robustness of NMOS device in a 0.25-mum CMOS technology is worse than its HBMESD robustness","PeriodicalId":138839,"journal":{"name":"7th International Symposium on Quality Electronic Design (ISQED'06)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-03-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Method to evaluate cable discharge event (CDE) reliability of integrated circuits in CMOS technology\",\"authors\":\"Tai-Xiang Lai, M. Ker\",\"doi\":\"10.1109/ISQED.2006.85\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Cable discharge event (CDE) has been the main cause which damages the Ethernet interface in field applications. The transmission line pulsing (TLP) system has been the most popular method to observe electric characteristics of the device under human-body-model (HEM) electrostatic discharge (ESD) stress. In this work, the long-pulse transmission line pulsing (LP-TLP) system is proposed to simulate CDE reliability of the Ethernet integrated circuits, and the results are compared with the conventional 100-ns TLP system. The experimental results have shown that the CDE robustness of NMOS device in a 0.25-mum CMOS technology is worse than its HBMESD robustness\",\"PeriodicalId\":138839,\"journal\":{\"name\":\"7th International Symposium on Quality Electronic Design (ISQED'06)\",\"volume\":\"79 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-03-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"7th International Symposium on Quality Electronic Design (ISQED'06)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED.2006.85\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"7th International Symposium on Quality Electronic Design (ISQED'06)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2006.85","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

电缆放电事件(CDE)是现场应用中造成以太网接口损坏的主要原因。传输线脉冲(TLP)系统已成为观察人体模型(HEM)静电放电(ESD)应力下器件电特性的最常用方法。本文提出了长脉冲传输线脉冲(LP-TLP)系统来模拟以太网集成电路的CDE可靠性,并与传统的100-ns TLP系统进行了比较。实验结果表明,采用0.25 μ m CMOS技术的NMOS器件的CDE鲁棒性比HBMESD鲁棒性差
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Method to evaluate cable discharge event (CDE) reliability of integrated circuits in CMOS technology
Cable discharge event (CDE) has been the main cause which damages the Ethernet interface in field applications. The transmission line pulsing (TLP) system has been the most popular method to observe electric characteristics of the device under human-body-model (HEM) electrostatic discharge (ESD) stress. In this work, the long-pulse transmission line pulsing (LP-TLP) system is proposed to simulate CDE reliability of the Ethernet integrated circuits, and the results are compared with the conventional 100-ns TLP system. The experimental results have shown that the CDE robustness of NMOS device in a 0.25-mum CMOS technology is worse than its HBMESD robustness
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