The Influence of Gate Poly-Silicon Oxidation on Negative Bias Temperature Instability in 3D FinFET

This paper presents the effects of gate poly-silicon oxidation (GPOX) on negative bias temperature instability (NBTI) in buried channel body-tied and SOI FinFETs for the first time using a measurement technique without a recovery during a NBT-stress test. Gate length dependency of the NBTI on FinFETs with GPOX is analyzed with various gate oxide thicknesses, stress biases, substrate biases, and device structures. In addition, the proposed revamped geometry-aware reaction-diffusion model explains the GPOX effects on 3D FinFET with gate length dependency.