CMOS组合电路中单桥故障的诊断方法

Proceedings of IEEE 3rd Asian Test Symposium (ATS) Pub Date : 1994-11-15 DOI:10.1109/ATS.1994.367248

K. Yamazaki, T. Yamada

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引用次数: 5

摘要

提出了一种CMOS组合电路中单桥故障的诊断方法。在这种方法中，使用由待测电路和给定测试构建的诊断表，推导出在主输出处观察到的错误的原因。诊断表的大小与[门数]/spl倍/[测试数]成正比，比故障字典小得多。实验结果表明，在检测单卡故障时，CPU时间几乎与电路大小成正比，大多数故障的分辨率都小于100。

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An approach of diagnosing single bridging faults in CMOS combinational circuits

An approach of diagnosing single bridging faults in CMOS combinational circuits is proposed. In this approach, the cause of an error observed at the primary outputs is deduced using a diagnosis table constructed from the circuit under test and the given tests. The size of a diagnosis table is proportional to [the number of gates]/spl times/[the number of tests], which is much smaller than that of the fault dictionary. The experimental results show that the CPU time is nearly proportional to the size of the circuit and the resolutions for most faults are less than 100, when using the tests to detect single stuck-at faults.<>

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Proceedings of IEEE 3rd Asian Test Symposium (ATS)

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