HLS中的冗余数据类型和操作及其在机器人控制器单元容错评估中的应用

Jakub Lojda, Jakub Podivinsky, Z. Kotásek
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引用次数: 3

摘要

某些环境(如空间、航空航天或医疗系统)要求电子系统能够承受不断增加的故障发生。此外,这些电子系统的故障会造成巨大的经济损失或危害人体健康。容错是其中一种技术,其目标是避免这种情况。本文提出了一种利用高级综合(High-Level Synthesis, HLS)方法评估单个系统分区重要性的方法。通过使用基于HLS输入规范修改的容错数据路径设计方法来评估各个分区的重要性。分区由一组变量和操作组成。本文还简要介绍了HLS系统的容错方法。我们的实验使用基于sram的FPGA评估平台进行评估,该平台允许我们分析被测设计(DUT)的容错特性。评估平台采用功能验证与故障注入相结合的方法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Redundant data types and operations in HLS and their use for a robot controller unit fault tolerance evaluation
Some environments (e.g. space, aerospace or medical systems) require electronic systems to withstand an increased, occurrence of faults. Moreover, the failure of these electronic systems can cause high economical losses or endanger human health. Fault tolerance is one of the techniques, the goal of which is to avoid such situations. This paper presents an approach to evaluate the degree of importance of individual system partitions when High-Level Synthesis (HLS) methodology is used. The importance of individual partitions was evaluated by the usage of our approach to fault-tolerant data-paths design which is based on the HLS input specification modification. The partitions are formed by sets of variables and operations. A brief description of the approach to fault tolerance in HLS is shown in the paper as well. Our experiments are evaluated using an SRAM-based FPGA evaluation platform which allows us to analyze fault tolerance properties of the Design Under Test (DUT). In the evaluation platform, functional verification in combination with fault injection is utilized.
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