{"title":"基于跨导电流比的mosfet从线性到饱和模式阈值电压提取","authors":"M. Bucher, N. Makris, Loukas Chevas","doi":"10.1109/LAEDC58183.2023.10209129","DOIUrl":null,"url":null,"abstract":"The present work describes a technique for extracting MOSFET threshold voltage from linear to saturation modes. Based on the charge-based model, transconductance-to-current ratio provides a direct way to determine threshold voltage analytically. Experimental data from advanced bulk CMOS processes corroborate the advantages of the present technique, such as consistent estimation of drain induced barrier lowering and reverse short-channel effects.","PeriodicalId":151042,"journal":{"name":"2023 IEEE Latin American Electron Devices Conference (LAEDC)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Transconductance-to-Current Ratio Based Threshold Voltage Extraction in MOSFETs from Linear to Saturation Modes\",\"authors\":\"M. Bucher, N. Makris, Loukas Chevas\",\"doi\":\"10.1109/LAEDC58183.2023.10209129\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The present work describes a technique for extracting MOSFET threshold voltage from linear to saturation modes. Based on the charge-based model, transconductance-to-current ratio provides a direct way to determine threshold voltage analytically. Experimental data from advanced bulk CMOS processes corroborate the advantages of the present technique, such as consistent estimation of drain induced barrier lowering and reverse short-channel effects.\",\"PeriodicalId\":151042,\"journal\":{\"name\":\"2023 IEEE Latin American Electron Devices Conference (LAEDC)\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-07-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE Latin American Electron Devices Conference (LAEDC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LAEDC58183.2023.10209129\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Latin American Electron Devices Conference (LAEDC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LAEDC58183.2023.10209129","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Transconductance-to-Current Ratio Based Threshold Voltage Extraction in MOSFETs from Linear to Saturation Modes
The present work describes a technique for extracting MOSFET threshold voltage from linear to saturation modes. Based on the charge-based model, transconductance-to-current ratio provides a direct way to determine threshold voltage analytically. Experimental data from advanced bulk CMOS processes corroborate the advantages of the present technique, such as consistent estimation of drain induced barrier lowering and reverse short-channel effects.