Pengyu Wei, Giorgi Maghlakelidze, Jianchi Zhou, H. Gossner, D. Pommerenke
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An Application of System Level Efficient ESD Design for HighSpeed USB3.x Interface
A high-speed USB3.x IO is analyzed using the System level efficient ESD design methodology [1] using on-board current and voltage measurements for the TX and RX pins. The interactions between external ESD protection device and the on-chip ESD protection circuit is investigated in measurement and simulation.