100ppm集成电路用户的实用测试策略

J. Westover
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引用次数: 1

摘要

值得注意的是,在20世纪80年代,集成电路供应商在产品质量方面取得了重大进步。结果,用户收到了大量故障率低于100 p.m的设备。这为用户提供了100%测试的替代方案,例如坞到库存和即时程序。虽然设备的质量有所提高,但不良率超过10000 p.p.m.的批次仍有报道。作者提出的测试结果表明,来自供应商的质量变化继续发生。结论是,用户应该考虑当前的结果,并从许多可用的策略中仔细制定自己的策略,以降低测试成本,同时最大限度地降低接受有缺陷设备的风险。本文概述了一些测试策略及其应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Practical test strategies for users of 100 p.p.m. ICs
It is noted that in 1980s, integrated circuit suppliers have made major improvements in their product quality. As a result, users are receiving large volumes of devices with failure rates of less than 100 p.p.m.. This has provided users with alternatives to 100% testing, such as dock-to-stock and just-in-time programs. Although the quality of devices has improved, lots with reject rates exceeding 10000 p.p.m. continue to be reported. The author presents test results that demonstrate that quality variations from suppliers continue to occur. It is concluded that users should consider current results and carefully develop, from the many strategies available, their own strategies for reducing test costs while minimizing the risk of accepting defective devices. A number of test strategies and their applications are outlined.<>
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