D. Rodopoulos, S. Mahato, V. V. de Almeida Camargo, B. Kaczer, F. Catthoor, S. Cosemans, G. Groeseneken, A. Papanikolaou, D. Soudris
{"title":"电路仿真中与时间和工作负载相关的器件可变性","authors":"D. Rodopoulos, S. Mahato, V. V. de Almeida Camargo, B. Kaczer, F. Catthoor, S. Cosemans, G. Groeseneken, A. Papanikolaou, D. Soudris","doi":"10.1109/ICICDT.2011.5783193","DOIUrl":null,"url":null,"abstract":"Simulations of an inverter and a 32-bit SRAM bit slice are performed based on an atomistic approach. The circuits' devices are populated with individual defects, which have realistic carrier-capture and emission behaviour. The wide distribution of defect time scales, accounts for both fast (Random Telegraph Noise - RTN) and near-permanent (Bias Temperature Instability - BTI) defects. The atomistic property of the model allows the detection of workload dependency in the delay of both circuits.","PeriodicalId":402000,"journal":{"name":"2011 IEEE International Conference on IC Design & Technology","volume":"16 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"33","resultStr":"{\"title\":\"Time and workload dependent device variability in circuit simulations\",\"authors\":\"D. Rodopoulos, S. Mahato, V. V. de Almeida Camargo, B. Kaczer, F. Catthoor, S. Cosemans, G. Groeseneken, A. Papanikolaou, D. Soudris\",\"doi\":\"10.1109/ICICDT.2011.5783193\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Simulations of an inverter and a 32-bit SRAM bit slice are performed based on an atomistic approach. The circuits' devices are populated with individual defects, which have realistic carrier-capture and emission behaviour. The wide distribution of defect time scales, accounts for both fast (Random Telegraph Noise - RTN) and near-permanent (Bias Temperature Instability - BTI) defects. The atomistic property of the model allows the detection of workload dependency in the delay of both circuits.\",\"PeriodicalId\":402000,\"journal\":{\"name\":\"2011 IEEE International Conference on IC Design & Technology\",\"volume\":\"16 3\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-05-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"33\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE International Conference on IC Design & Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICDT.2011.5783193\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Conference on IC Design & Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2011.5783193","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Time and workload dependent device variability in circuit simulations
Simulations of an inverter and a 32-bit SRAM bit slice are performed based on an atomistic approach. The circuits' devices are populated with individual defects, which have realistic carrier-capture and emission behaviour. The wide distribution of defect time scales, accounts for both fast (Random Telegraph Noise - RTN) and near-permanent (Bias Temperature Instability - BTI) defects. The atomistic property of the model allows the detection of workload dependency in the delay of both circuits.