Mechanism of moisture uptake induced via failure and its impact on 45nm node interconnect design

T. Fujimaki, K. Higashi, N. Nakamura, N. Matsunaga, K. Yoshida, N. Miyawaki, M. Hatano, M. Hasunuma, J. Wada, T. Nishioka, K. Akiyama, H. Kawashima, Y. Enomoto, T. Hasegawa, K. Honda, M. Iwai, S. Yamada, F. Matsuoka
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引用次数: 5

Abstract

Moisture induced via failure (MIVF) is studied for 45nm interconnect technology using porous low-k films. Test patterns are designed to examine the layout dependence of the MIVF. Some fundamental and important layout dependencies of the via resistance increase are investigated and considered for the first time. It has been found that the MIVF has not been suppressed, even though multiple vias structure is adopted. On the contrary, local wiring pattern density close to via and dummy wiring pattern area size strongly affect via resistance increase. A model with moisture ventilation can successfully explain those layout dependencies. It is confirmed that the MIVF is completely suppressed by the control of dummy pattern layout
失效诱导吸湿机理及其对45nm节点互连设计的影响
采用多孔低钾薄膜,研究了45纳米互连技术中的失效致湿(MIVF)现象。设计测试模式是为了检查MIVF的布局依赖性。本文首次研究和考虑了通孔电阻增加的一些基本和重要的布局依赖关系。研究发现,即使采用多通孔结构,MIVF也没有被抑制。相反,靠近过孔的局部布线密度和虚拟布线面积大小对过孔电阻的增加影响较大。具有潮湿通风的模型可以成功地解释这些布局依赖关系。仿真结果表明,虚拟模式布局控制可以完全抑制MIVF
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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