Power Integrity Performance Gain of a Novel Integrated Stack Capacitor (ISC) Solution for High-end Computing Applications

Abstract

An integrated stack capacitor (ISC) solution, which can effectively suppress power noise in high frequency bands, is introduced. The basic structure of the ISC is a vertical cylinder array consisting of many capacitive vias. The proposed ISC shows high capacitance density compared to the existing silicon capacitors. In this study, the power integrity (PI) performance gain of the proposed ISC solution was analyzed by applying it to the advanced package platforms such as 2.5D silicon interposer, fanout (FO) package, RDL interposer, and substrate based chiplet. Based on 3D wafer on wafer (WoW) technology, ISC is a not only 2.5D silicon interposer for high performance computing (HPC) and server that operates with high power, but also a novel silicon capacitor solution that can be applied to substrate and fanout packages for mobile and automotive.