Numerical Model for Understanding Failure Mechanism of Back End of Line (BEOL) in Bump Shear

Wei Wang, Wei Zhao, Mark Nakamoto, M. Schwarz, D. He, Xuefeng Zhang, Lily Zhao, A. Syed
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引用次数: 1

Abstract

With the increasing requirement for advanced technology nodes in high-performance devices, low-K (LK), ultralow-K (ULK) and extreme low K (ELK) dielectric materials have been integrated with copper pillar bumps in Back-End-of-Line (BEOL) interconnects in flip chips to reduce capacitance and thus resistance-capacitance (RC) delay. The dielectric materials (LK, ULK and ELK) are fragile compared to silicon oxide. Due to large coefficient of thermal expansion (CTE) mismatch between the die and substrate, dielectric crack and delamination can be induced by the stress transferred by the stiffer copper pillar bumps during chip attach reflow. It is thus important to characterize silicon BEOL strength for chip-package-interaction (CPI) qualification.Bump shear provides a quick method to characterize the silicon BEOL strength by shearing the copper pillar bumps. However, the failure mode in bump shear test is complex and poses a challenge for understanding the failure mechanism. It was observed experimentally that the failure mode induced by bump shear depends on the shear height. Generally, brittle dielectric failure can be induced with a higher shear height. In contrast, ductile Aluminum pad (AP) failure can occur with a lower shear height. A mixed failure mode of both dielectric failure and AP failure may also occur, making the failure mechanism more complex. Furthermore, it was found that metal layout in the BEOL could also affect the critical shear force in the shear load curve.This paper presents a numerical model for better understanding the failure mechanism of BEOL in bump shear. First, a stress model is developed to understand the stress distribution in bump shear. In this work, a contact/target element model is used to simulate the interaction of shear tool surface with the bump surface and a cohesive zone material (CZM) model is used to simulate the potential interface debonding. Plasticity of copper pillar is also considered to capture the plastic energy dissipation. Therefore, the bump/shear tool interaction, energy release due to crack propagation and copper plastic energy dissipation can be well captured in the model. Then an ELK fracture model is also developed to understand the BEOL crack failure. The impact of metal density on ELK crack is evaluated by comparing the energy release rate at the crack tip. The impact of dielectric material properties on the ELK crack is also evaluated. The numerical models provide a good understanding of the stress distribution and BEOL fracture mechanism in bump shear.
理解凹凸剪切后端破坏机制的数值模型
随着高性能器件对先进技术节点的需求不断增加,低K (LK)、超低K (ULK)和极低K (ELK)介电材料已与倒装芯片的后端线(BEOL)互连中的铜柱凸点集成在一起,以减少电容,从而减少电阻-电容(RC)延迟。与氧化硅相比,介质材料(LK、ULK和ELK)是脆弱的。由于芯片与衬底之间存在较大的热膨胀系数失配,在贴片再流过程中,较硬的铜柱凸起传递的应力会引起介质裂纹和分层。因此,表征硅BEOL强度对于芯片封装相互作用(CPI)的鉴定是非常重要的。凸点剪切是一种通过剪切铜柱凸点来表征硅BEOL强度的快速方法。然而,碰撞剪切试验的破坏模式复杂,给理解其破坏机制带来了挑战。实验结果表明,凹凸剪切引起的破坏模式与剪切高度有关。一般来说,较高的剪切高度可诱发脆性介质破坏。相比之下,韧性铝垫(AP)在较低的剪切高度下也会发生破坏。也可能出现介电破坏和AP破坏的混合破坏模式,使得破坏机制更加复杂。此外,发现金属在BEOL中的布局也会影响剪切载荷曲线中的临界剪切力。为了更好地理解BEOL在磕碰剪切中的破坏机理,本文提出了一个数值模型。首先,建立了应力模型,了解了凹凸剪切过程中的应力分布。在这项工作中,使用接触/目标单元模型来模拟剪切工具表面与凹凸表面的相互作用,并使用粘聚区材料(CZM)模型来模拟潜在的界面剥离。铜柱的塑性也被考虑,以捕捉塑性能量耗散。因此,碰撞/剪切工具的相互作用、裂纹扩展的能量释放和铜塑性能量耗散可以很好地捕捉到模型中。然后建立了ELK断裂模型来理解BEOL裂纹破坏。通过比较裂纹尖端的能量释放率来评价金属密度对ELK裂纹的影响。并对介电材料性能对ELK裂纹的影响进行了评价。数值模型对凹凸剪切作用下的应力分布和BEOL断裂机制有较好的理解。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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