Combinational test generation for transition faults in acyclic sequential circuits

Abstract

This paper presents a combinational test generation method for transition faults in acyclic sequential circuits. In this method, to generate test sequences for transition faults in a given acyclic sequential circuit is performed on its extend time-expansion model. The model is composed of two copies of time-expansion model of the given circuit and extends in the close two sequences to generate 2 vectors for the transition faults with some restrictions. Experimental results show the method can achieve the higher fault efficiency with the lower test generation times than conventional method.