A numerical prediction of wire crossover applying to microchip encapsulation

Abstract

Microchip encapsulation is of dominance in the packaging of Plastic-Encapsulated Microelectronics (PEM). During fabrication of the encapsulation, the sweep deflection of wire bond caused by compound flows obviously results in wire crossover and shorting. Thereby, it is necessary to understand mechanical behaviors of the wire sweep, while it is critical that reduction of the sweep yields clearance of sufficient space between wires. As a rule, a position of a wire with the largest Wire Sweep Index (WSI) possesses the highest possibility of the wire crossover. Recent advances of the encapsulation technologies tend toward smaller scale and higher density, wherein the wire crossover is observed with difficulty. To date, the Computer-Aided Engineering (CAE) technologies have been preferably used in viewing positions of wire crossover. Using the CAE technology, the primary objective of this paper is to develop a useful tool to connect pre-process, filling and structure analyses and post-process, which gives a comprehensive solution for microchip encapsulation. In particular, the wire sweep phenomenon inside the package is found. Furthermore, the CAE users can check the possibility of wire crossover under any processing condition. Thus, application of the CAE technology significantly introducing to mold design for microchip encapsulation is feasible with high reliability.