Overcoming DRAM scaling limitations by employing straight recessed channel array transistors with <100> uni-axial and [100] uni-plane channels

Abstract

Recessed channel array transistors (RCAT) for DRAM are implemented with <100> uni-axial and {100} uni-plane channels for the first time. It is found that this structure improves the cell transistor drivability by 25% with the improvement being more effective in straight shape active RCAT than the diagonal shape active RCAT due to the larger dimension of the horizontal <100> axial channel in the {100} plane. Enhanced RCAT drivability improves tRDL (allowed time interval between data-in and word-line precharge) and retention time, which allows for lowering the gate voltage over-drive (VPP) in DRAM operation. This possibility provides a breakthrough in reliability limitations and leads to better performance in nano-scaled DRAM