Stress-induced voiding under vias connected to "narrow" copper lines

T. Kouno, I.T. Suzuki, S. Otsuka, T. Hosoda, I. Nakamura, I. Mizushima, M. Shiozu, H. Matsuyama, K. Shono, H. Watatani, Y. Ohkura, M. Sato, S. Fukuyama, M. Miyajima
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引用次数: 8

Abstract

Stress-induced voiding under vias connected to "narrow" Copper (Cu) lines (SIV-N) was observed, for the first time, using newly prepared test structures which consisted of isolated vias between narrow (0.14 mum-wide) and very long (200 mum-long) 2-level Cu wires. Mechanism of SIV-N is different from that of well-known stress-induced voiding under vias connected to "wide" Cu lines (SIV-W), because SIV-N cannot occur during actual time according to the model that explains SIV-W. In addition, we found the effect of plasma pretreatment of cap dielectrics and cap dielectrics themselves on SIV-N and the other reliability issues, and succeeded in obtaining the condition which satisfied SIV-N, SIV-W and EM
连接“窄”铜线的通孔下应力引起的空洞
使用新制备的测试结构,首次观察到连接“窄”铜(Cu)线(SIV-N)的过孔下的应力诱导空化,该结构由窄(0.14 mm宽)和很长(200 mm长)2级铜线之间的隔离过孔组成。SIV-N的机制不同于众所周知的“宽”铜线连接的通孔下应力引起的空化(SIV-W),因为根据解释SIV-W的模型,SIV-N不能在实际时间内发生。此外,我们还发现了等离子体预处理帽介质和帽介质本身对SIV-N和其他可靠性问题的影响,并成功地获得了满足SIV-N、SIV-W和EM的条件
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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