Fabrication of Al-Based Superconducting High-Aspect Ratio TSVS for Quantum 3D Integration

J. Alfaro-Barrantes, M. Mastrangeli, D. Thoen, J. Bueno, J. Baselmans, P. Sarro
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引用次数: 2

Abstract

We describe a microfabrication process that, thanks to a specifically tailored sidewall profile, enables for the first-time wafer-scale arrays of high-aspect ratio through-silicon vias (TSVs) coated with DC-sputtered Aluminum, achieving at once superconducting and CMOS-compatible 3D interconnects. Void-free conformal coating of up to $500\ \mu\mathrm{m}$-deep and $50\ \mu\mathrm{m}$-wide vias with a mere $2\ \mu\mathrm{m}$-thick layer of Al, a widely available metal in for IC manufacturing, was demonstrated. Single-via electric resistance as low as $468 \mathrm{m}\Omega$ at room temperature and superconductivity at 1.25 K were measured by a cross-bridge Kelvin resistor structure. This work establishes the fabrication of functional superconducting interposers suitable for 3D integration of high-density silicon-based quantum computing architectures.
用于量子三维集成的铝基超导高纵横比TSVS的制备
我们描述了一种微制造工艺,由于专门定制的侧壁轮廓,首次实现了涂有直流溅射铝的高纵横比硅通孔(tsv)的晶圆级阵列,同时实现了超导和cmos兼容的3D互连。无孔洞的保形涂层高达$500\ \mu\mathrm{m}$ -深和$50\ \mu\mathrm{m}$ -宽的通孔,只有$2\ \mu\mathrm{m}$ -厚的Al层,广泛用于IC制造的金属,被证明。采用开尔文电阻器结构测量了室温下低至$468 \mathrm{m}\Omega$的单通孔电阻和1.25 K时的超导性。本工作建立了适用于高密度硅基量子计算架构3D集成的功能超导中间体的制造。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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