The effect of hafnium or zirconium contamination on MOS processes

Abstract

Hf and Zr contamination during immersion in process solutions is most likely to occur in neutral or caustic solutions. Both Hf and Zr contamination are introduced onto the wafer surface if they are present in an APM solution (which is caustic), but such contamination is easily removed using existing cleans. If contamination remains on a wafer, an effect on gate oxide integrity using ramped voltage testing is only observed at very high concentrations of Hf. Time dependent dielectric breakdown results are affected at lower levels of contamination. This is true particularly if the contamination is introduced using an APM solution. Wafer-to-wafer cross contamination can also occur in a thermal reactor during high temperature anneals of high-k dielectric layers.