A 2-tier Embedded 3D Capacitor with High Aspect Ratio TSV

Abstract

This paper describes the concept and demonstration of a 2-tier MIMIM capacitor that can be placed around a TSV. By fabricating the metal-insulator-metal-insulator-metal (MIMIM) capacitor around the TSV, more than 30× increase in capacitance over a planar capacitor occupying the same planar area can be achieved. High-k dielectric, HfO2 is deposited using Atomic Layer Deposition (ALD) process for good and uniform coverage required in TSV. By employing an insulator with large dielectric constant (with reference to SiO2), capacitance can be increased significantly. Thermomechanical simulations have verified that there is little impact to the stress induced in the Si and Keep-Out-Zone (KOZ) of TSVs around which the MIMIM capacitor is embedded.