Electrical properties of 30 nm width bi-layer interconnects of multi layer graphene and Ni

Abstract

We have fabricated the stacked interconnects of multi-layer graphene (MLG) and nickel (Ni) at the line width from 30 to 1000 nm in 300 mm wafer. MLG, which was grown by CVD process, was selectively deposited on Ni damascene interconnects by the catalytic reaction of Ni. MLG grown from C2H2 was composed of approximately 20 layers of graphene sheets and covered the overall surface of Ni interconnects. Two processes, one with the gas mixture of C2H2/Ar and the other with only Ar gas, were compared and short failure was observed at the comb structure specifically by the usage of C2H2 gas. Along with the failure analysis, this short failure was suggested to be caused by the unintended growth of carbon material from the Ni nanoparticle on the interconnects. An addition of ashing process improved the electrical performance with the minimum damage to MLG. At last, crystalline analysis of MLG suggests a necessity of a continuous process optimization of CVD process for positive influence on resistivity of the interconnects.