Modeling and analysis of vertical noise coupling between clock tree and channel routing wire in 3D mixed signal integration

Abstract

This paper reports on the vertical noise coupling between a clock wire in digital IC and channel routing wires in analog IC in 3D mixed signal integration. Full wave electromagnetic simulations are employed to evaluate the vertical noise coupling. The coupling mechanism is discussed with transfer impedance. Insights to vertical noise coupling between interconnects in 3D integration are offered and possible solutions are provided to reduce the noise.