Manufacturing implementation of low-k dielectrics for copper damascene technology

H. Ruelke, C. Streck, J. Hohage, S. Weiher-Telford, O. Chretrien
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引用次数: 3

Abstract

Advanced logic devices are setting new demands for backend integration. New high-end processor families like the AMD Athlon/sup TM/ and AMD's eighth generation processor (codenamed "Hammer"), require the introduction of low-k interlayer dielectric (ILD) materials with copper to enable improvements in chip speed and reduction of overall power consumption. This is a challenging process for both tool suppliers and integrated circuit manufacturers. The semiconductor industry is looking for a low-k solution that delivers easy-to-integrate, high-performance dielectric films combined with high throughput and low cost of ownership. Based on key technical and manufacturing requirements, Advanced Micro Devices, Inc. has chosen the Applied Materials Producer system for low-k dielectric process applications. Implementation of Black Diamond/sup TM/ (BD) and BLOk/sup TM/ into the process flow enables an integrated k value of <3.0, which represents a 20 percent reduction compared to fluorinated silicate glass (F-TEOS) and silicon nitride (SiN). At Fab 30, AMD's advanced copper manufacturing line, the Producer has demonstrated reliable and stable performance in high volume production for the deposition of conventional dielectric films. This paper focuses on bringing a low-k dielectric solution beyond F-TEOS to full manufacturing readiness for copper interconnect technology.
低k介电体的制造实施铜大马士革技术
先进的逻辑设备对后端集成提出了新的要求。新的高端处理器系列,如AMD Athlon/sup TM/和AMD的第八代处理器(代号为“Hammer”),需要引入低k铜层介电层(ILD)材料,以提高芯片速度并降低整体功耗。这对工具供应商和集成电路制造商来说都是一个具有挑战性的过程。半导体行业正在寻找一种低k解决方案,提供易于集成的高性能介电薄膜,同时具有高吞吐量和低拥有成本。基于关键技术和制造要求,Advanced Micro Devices公司选择了应用材料生产商系统用于低k介电工艺应用。在工艺流程中实施Black Diamond/sup TM/ (BD)和block /sup TM/,使集成k值<3.0,与氟化硅酸盐玻璃(F-TEOS)和氮化硅(SiN)相比,降低了20%。在Fab 30, AMD的先进的铜生产线,生产商已经证明了可靠和稳定的性能在传统介电薄膜沉积的大批量生产。本文的重点是将低k介电介质解决方案超越F-TEOS,以实现铜互连技术的完全制造就绪。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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