H. Ruelke, C. Streck, J. Hohage, S. Weiher-Telford, O. Chretrien
{"title":"Manufacturing implementation of low-k dielectrics for copper damascene technology","authors":"H. Ruelke, C. Streck, J. Hohage, S. Weiher-Telford, O. Chretrien","doi":"10.1109/ASMC.2002.1001633","DOIUrl":null,"url":null,"abstract":"Advanced logic devices are setting new demands for backend integration. New high-end processor families like the AMD Athlon/sup TM/ and AMD's eighth generation processor (codenamed \"Hammer\"), require the introduction of low-k interlayer dielectric (ILD) materials with copper to enable improvements in chip speed and reduction of overall power consumption. This is a challenging process for both tool suppliers and integrated circuit manufacturers. The semiconductor industry is looking for a low-k solution that delivers easy-to-integrate, high-performance dielectric films combined with high throughput and low cost of ownership. Based on key technical and manufacturing requirements, Advanced Micro Devices, Inc. has chosen the Applied Materials Producer system for low-k dielectric process applications. Implementation of Black Diamond/sup TM/ (BD) and BLOk/sup TM/ into the process flow enables an integrated k value of <3.0, which represents a 20 percent reduction compared to fluorinated silicate glass (F-TEOS) and silicon nitride (SiN). At Fab 30, AMD's advanced copper manufacturing line, the Producer has demonstrated reliable and stable performance in high volume production for the deposition of conventional dielectric films. This paper focuses on bringing a low-k dielectric solution beyond F-TEOS to full manufacturing readiness for copper interconnect technology.","PeriodicalId":64779,"journal":{"name":"半导体技术","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"半导体技术","FirstCategoryId":"1087","ListUrlMain":"https://doi.org/10.1109/ASMC.2002.1001633","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Advanced logic devices are setting new demands for backend integration. New high-end processor families like the AMD Athlon/sup TM/ and AMD's eighth generation processor (codenamed "Hammer"), require the introduction of low-k interlayer dielectric (ILD) materials with copper to enable improvements in chip speed and reduction of overall power consumption. This is a challenging process for both tool suppliers and integrated circuit manufacturers. The semiconductor industry is looking for a low-k solution that delivers easy-to-integrate, high-performance dielectric films combined with high throughput and low cost of ownership. Based on key technical and manufacturing requirements, Advanced Micro Devices, Inc. has chosen the Applied Materials Producer system for low-k dielectric process applications. Implementation of Black Diamond/sup TM/ (BD) and BLOk/sup TM/ into the process flow enables an integrated k value of <3.0, which represents a 20 percent reduction compared to fluorinated silicate glass (F-TEOS) and silicon nitride (SiN). At Fab 30, AMD's advanced copper manufacturing line, the Producer has demonstrated reliable and stable performance in high volume production for the deposition of conventional dielectric films. This paper focuses on bringing a low-k dielectric solution beyond F-TEOS to full manufacturing readiness for copper interconnect technology.