{"title":"A Simulation Study for Typical Design Rule Patterns in 5 nm Logic Process with EUV Photolithographic Process","authors":"Yanli Li, Qiang Wu, Shoumian Chen","doi":"10.33079/jomm.19020406","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":66020,"journal":{"name":"微电子制造学报","volume":"1 1","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2019-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"微电子制造学报","FirstCategoryId":"1089","ListUrlMain":"https://doi.org/10.33079/jomm.19020406","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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