VPOS: A Specific Operating System for the FPGA Verification of Microprocessor System-level Functions

Abstract

System-level Functions (SLF) of microprocessors such as Memory Management and Interrupt Handling that provide hardware support to the software are hard to be verified on an FPGA prototype where the behavioral testbench building the complex software contexts can not be mapped. Traditionally, the FPGA verification task is performed by running a General Purpose Operating System (GPOS) like Linux, which is debugging inefficient and hard to be controlled. In this paper, the authors have proposed a Verification Purpose Operating System (VPOS) on FPGA to initialize machine resources and to build software contexts for directed or random tests. This framework greatly reduces the debugging complexity by seamlessly interacting with SW-simulation, and considerably increases coverage as opposed to the Linux-based method by providing high flexibility. We assess the feasibility of our approach by applying it to a microprocessor designed by our institute.