{"title":"Recent progress on bumpless Cu/SiO2 hybrid bonding for 3D heterogeneous integration","authors":"Ge Li, Qiushi Kang, F. Niu, Chenxi Wang","doi":"10.1108/mi-07-2022-0121","DOIUrl":null,"url":null,"abstract":"\nPurpose\nBumpless Cu/SiO2 hybrid bonding, which this paper aims to, is a key technology of three-dimensional (3D) high-density integration to promote the integrated circuits industry’s continuous development, which achieves the stacks of chips vertically connected via through-silicon via. Surface-activated bonding (SAB) and thermal-compression bonding (TCB) are used, but both have some shortcomings. The SAB method is overdemanding in the bonding environment, and the TCB method requires a high temperature to remove copper oxide from surfaces, which increases the thermal budget and grossly damages the fine-pitch device.\n\n\nDesign/methodology/approach\nIn this review, methods to prevent and remove copper oxidation in the whole bonding process for a lower bonding temperature, such as wet treatment, plasma surface activation, nanotwinned copper and the metal passivation layer, are investigated.\n\n\nFindings\nThe cooperative bonding method combining wet treatment and plasma activation shows outstanding technological superiority without the high cost and additional necessity of copper passivation in manufacture. Cu/SiO2 hybrid bonding has great potential to effectively enhance the integration density in future 3D packaging for artificial intelligence, the internet of things and other high-density chips.\n\n\nOriginality/value\nTo achieve heterogeneous bonding at a lower temperature, the SAB method, chemical treatment and the plasma-assisted bonding method (based on TCB) are used, and surface-enhanced measurements such as nanotwinned copper and the metal passivation layer are also applied to prevent surface copper oxide.\n","PeriodicalId":49817,"journal":{"name":"Microelectronics International","volume":" ","pages":""},"PeriodicalIF":0.7000,"publicationDate":"2022-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics International","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1108/mi-07-2022-0121","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 2
Abstract
Purpose
Bumpless Cu/SiO2 hybrid bonding, which this paper aims to, is a key technology of three-dimensional (3D) high-density integration to promote the integrated circuits industry’s continuous development, which achieves the stacks of chips vertically connected via through-silicon via. Surface-activated bonding (SAB) and thermal-compression bonding (TCB) are used, but both have some shortcomings. The SAB method is overdemanding in the bonding environment, and the TCB method requires a high temperature to remove copper oxide from surfaces, which increases the thermal budget and grossly damages the fine-pitch device.
Design/methodology/approach
In this review, methods to prevent and remove copper oxidation in the whole bonding process for a lower bonding temperature, such as wet treatment, plasma surface activation, nanotwinned copper and the metal passivation layer, are investigated.
Findings
The cooperative bonding method combining wet treatment and plasma activation shows outstanding technological superiority without the high cost and additional necessity of copper passivation in manufacture. Cu/SiO2 hybrid bonding has great potential to effectively enhance the integration density in future 3D packaging for artificial intelligence, the internet of things and other high-density chips.
Originality/value
To achieve heterogeneous bonding at a lower temperature, the SAB method, chemical treatment and the plasma-assisted bonding method (based on TCB) are used, and surface-enhanced measurements such as nanotwinned copper and the metal passivation layer are also applied to prevent surface copper oxide.
期刊介绍:
Microelectronics International provides an authoritative, international and independent forum for the critical evaluation and dissemination of research and development, applications, processes and current practices relating to advanced packaging, micro-circuit engineering, interconnection, semiconductor technology and systems engineering. It represents a current, comprehensive and practical information tool. The Editor, Dr John Atkinson, welcomes contributions to the journal including technical papers, research papers, case studies and review papers for publication. Please view the Author Guidelines for further details.
Microelectronics International comprises a multi-disciplinary study of the key technologies and related issues associated with the design, manufacture, assembly and various applications of miniaturized electronic devices and advanced packages. Among the broad range of topics covered are:
• Advanced packaging
• Ceramics
• Chip attachment
• Chip on board (COB)
• Chip scale packaging
• Flexible substrates
• MEMS
• Micro-circuit technology
• Microelectronic materials
• Multichip modules (MCMs)
• Organic/polymer electronics
• Printed electronics
• Semiconductor technology
• Solid state sensors
• Thermal management
• Thick/thin film technology
• Wafer scale processing.