A Full-Stack View of Probabilistic Computing With p-Bits: Devices, Architectures, and Algorithms

IF 2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Shuvro Chowdhury;Andrea Grimaldi;Navid Anjum Aadit;Shaila Niazi;Masoud Mohseni;Shun Kanai;Hideo Ohno;Shunsuke Fukami;Luke Theogarajan;Giovanni Finocchio;Supriyo Datta;Kerem Y. Camsari
{"title":"A Full-Stack View of Probabilistic Computing With p-Bits: Devices, Architectures, and Algorithms","authors":"Shuvro Chowdhury;Andrea Grimaldi;Navid Anjum Aadit;Shaila Niazi;Masoud Mohseni;Shun Kanai;Hideo Ohno;Shunsuke Fukami;Luke Theogarajan;Giovanni Finocchio;Supriyo Datta;Kerem Y. Camsari","doi":"10.1109/JXCDC.2023.3256981","DOIUrl":null,"url":null,"abstract":"The transistor celebrated its 75th birthday in 2022. The continued scaling of the transistor defined by Moore’s law continues, albeit at a slower pace. Meanwhile, computing demands and energy consumption required by modern artificial intelligence (AI) algorithms have skyrocketed. As an alternative to scaling transistors for general-purpose computing, the integration of transistors with unconventional technologies has emerged as a promising path for domain-specific computing. In this article, we provide a full-stack review of probabilistic computing with p-bits as a representative example of the energy-efficient and domain-specific computing movement. We argue that p-bits could be used to build energy-efficient probabilistic systems, tailored for probabilistic algorithms and applications. From hardware, architecture, and algorithmic perspectives, we outline the main applications of probabilistic computers ranging from probabilistic machine learning (ML) and AI to combinatorial optimization and quantum simulation. Combining emerging nanodevices with the existing CMOS ecosystem will lead to probabilistic computers with orders of magnitude improvements in energy efficiency and probabilistic sampling, potentially unlocking previously unexplored regimes for powerful probabilistic algorithms.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":"9 1","pages":"1-11"},"PeriodicalIF":2.0000,"publicationDate":"2023-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/10138050/10068500.pdf","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10068500/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 16

Abstract

The transistor celebrated its 75th birthday in 2022. The continued scaling of the transistor defined by Moore’s law continues, albeit at a slower pace. Meanwhile, computing demands and energy consumption required by modern artificial intelligence (AI) algorithms have skyrocketed. As an alternative to scaling transistors for general-purpose computing, the integration of transistors with unconventional technologies has emerged as a promising path for domain-specific computing. In this article, we provide a full-stack review of probabilistic computing with p-bits as a representative example of the energy-efficient and domain-specific computing movement. We argue that p-bits could be used to build energy-efficient probabilistic systems, tailored for probabilistic algorithms and applications. From hardware, architecture, and algorithmic perspectives, we outline the main applications of probabilistic computers ranging from probabilistic machine learning (ML) and AI to combinatorial optimization and quantum simulation. Combining emerging nanodevices with the existing CMOS ecosystem will lead to probabilistic computers with orders of magnitude improvements in energy efficiency and probabilistic sampling, potentially unlocking previously unexplored regimes for powerful probabilistic algorithms.
概率计算的全栈视图与p位:设备,架构和算法
晶体管在2022年庆祝了其75岁生日。摩尔定律所定义的晶体管的持续缩小仍在继续,尽管速度有所放缓。与此同时,现代人工智能(AI)算法所需的计算需求和能耗也在飙升。作为通用计算的缩放晶体管的替代方案,晶体管与非常规技术的集成已经成为特定领域计算的一个有前途的途径。在本文中,我们提供了p位概率计算的全栈回顾,作为节能和特定领域计算运动的代表性示例。我们认为,p比特可以用来构建节能的概率系统,为概率算法和应用量身定制。从硬件、架构和算法的角度,我们概述了概率计算机的主要应用,从概率机器学习(ML)和人工智能到组合优化和量子模拟。将新兴的纳米器件与现有的CMOS生态系统相结合,将导致概率计算机在能源效率和概率采样方面有数量级的提高,有可能为强大的概率算法打开以前未开发的机制。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
CiteScore
5.00
自引率
4.20%
发文量
11
审稿时长
13 weeks
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