Instruction Error Detection With Bloom Filters: Architecture, Radiation Testing, and Fault Injection

Abstract

As memory cells continue to shrink in modern semiconductor technologies, radiation-induced Single Event Effects (SEEs), such as single- and multi-bit upsets, pose growing challenges to system reliability. While traditional error detection and correction approaches, such as Error Correcting Codes (ECC), are effective for single- and double-bit errors, they incur substantial overhead and complexity when scaled to detect multiple-bit errors. This study leverages the space-efficient and low-latency properties of Bloom Filters (BF) to create a lightweight, probabilistic instruction checker. We implement this checker within a stand-alone memory subsystem as well as directly into the instruction fetch path of the NEORV32 RISC-V soft-core and validate its performance using two separate neutron beam irradiation campaigns and complementary emulation-based fault injection campaigns. Experimental results from neutron beam tests and fault injection campaigns demonstrate the checker’s effectiveness in detecting single- and multi-bit errors, with measured detection rates near theoretical targets. Additionally, the integration of the BF-based checker into the NEORV32 soft core showcases its practical applicability in a microprocessor environment, maintaining high detection coverage even under multi-bit error conditions that degrade ECC reliability.