A Page-Sector Joint Degradation-Reliability Error Analysis Model for High-Density NAND Flash

IF 2.7 3区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Transactions on Device and Materials Reliability Pub Date : 2026-09-01 Epub Date: 2026-06-25 DOI:10.1109/TDMR.2026.3707285

Longbin Chen;Jian Huang;Ruibin Zhou;Yuhan Wang;Zhiyi Yu

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引用次数: 0

Abstract

Conventional flash error models, relying solely on an average raw bit error rate (RBER), fail to capture critical sector-level heterogeneity, leading to inaccurate reliability assessments and significant performance underestimation. We propose the Degradation-Reliability Error Analysis Model (DREAM) to jointly model page-level physical degradation factors such as program/erase cycle (PEC) and data retention time (RT), as well as sector-level statistical variability. By combining regularized thin-plate splines (TPS), a model-driven log-normal distribution, and random sampling, DREAM provides accurate intra-page sector RBER sets. Within the modeled range, it achieves a prediction mean absolute percentage error (MAPE) of 9.3%. Furthermore, simulation results based on real-world workloads reveal that existing average-based schemes, which solely predict page-level average RBER, underestimate the average read latency by approximately 16.1%, a discrepancy effectively captured by DREAM, facilitating a more realistic assessment of solid-state drive (SSD) reliability.

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高密度NAND闪存页扇区联合退化可靠性误差分析模型

传统的闪存错误模型，仅仅依赖于平均原始误码率（RBER），无法捕获关键扇区级的异质性，导致不准确的可靠性评估和严重的性能低估。我们提出了退化-可靠性错误分析模型（DREAM）来联合建模页级物理退化因素，如程序/擦除周期（PEC）和数据保留时间（RT），以及扇区级统计变异性。通过结合正则薄板样条（TPS）、模型驱动的对数正态分布和随机抽样，DREAM提供了准确的页内扇区RBER集。在模型范围内，预测平均绝对百分比误差（MAPE）为9.3%。此外，基于真实工作负载的模拟结果表明，现有的基于平均的方案（仅预测页级平均RBER）低估了平均读延迟约16.1%，DREAM有效捕获了这一差异，从而促进了对固态硬盘（SSD）可靠性的更现实评估。

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来源期刊

IEEE Transactions on Device and Materials Reliability 工程技术-工程：电子与电气

CiteScore

4.80

自引率

5.00%

发文量

审稿时长

6-12 weeks

期刊介绍： The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.