Pritika Singh;Harshita Rai;Tejendra Dixit;Shyam S. Pandey;Vipul Singh
{"title":"Synergistic Thin-Film Alignment and Surface Passivation for Anisotropic Charge Transport and Long-Term Stability in OFETs","authors":"Pritika Singh;Harshita Rai;Tejendra Dixit;Shyam S. Pandey;Vipul Singh","doi":"10.1109/TDMR.2026.3721283","DOIUrl":null,"url":null,"abstract":"Organic field-effect transistors (OFETs) based on conjugated polymers are promising for flexible, low-cost electronics; however, their performance is often limited by interfacial trap states and disordered molecular packing. In this work, the combined influence of fabrication method (spin coating and UFTM), dielectric interface engineering (OTS and CYTOP), and molecular orientation on the charge transport characteristics of poly(9,9-dioctylfluorene-alt-bithiophene) (F8T2)-based thin film transistors is systematically investigated. The UFTM process produces highly aligned polymer films, yielding pronounced optical anisotropy with a dichroic ratio of <inline-formula> <tex-math>$\\sim ~6.5$ </tex-math></inline-formula> at an optimized annealing temperature of <inline-formula> <tex-math>$120~^{\\circ }$ </tex-math></inline-formula>C. The optimized UFTM CYTOP <inline-formula> <tex-math>$(\\|)$ </tex-math></inline-formula> device exhibits a maximum field-effect mobility of <inline-formula> <tex-math>$\\sim 2.8\\times 10^{-3}$ </tex-math></inline-formula> cm<sup>2</sup> V<sup>−1</sup> s<sup>−1</sup>, an on/off current ratio of <inline-formula> <tex-math>$\\sim ~4\\times 10^{6}$ </tex-math></inline-formula>, improved threshold voltage, reduced subthreshold swing, excellent device-to-device reproducibility, while retaining <inline-formula> <tex-math>$\\sim ~80$ </tex-math></inline-formula>% of its initial mobility after 60 days under ambient conditions. These findings demonstrate a simple, low-cost, and scalable fabrication strategy for improving the electrical performance and operational reliability of F8T2-based OFETs.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"26 3","pages":"935-941"},"PeriodicalIF":2.7000,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Device and Materials Reliability","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11643843/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2026/8/6 0:00:00","PubModel":"Epub","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Organic field-effect transistors (OFETs) based on conjugated polymers are promising for flexible, low-cost electronics; however, their performance is often limited by interfacial trap states and disordered molecular packing. In this work, the combined influence of fabrication method (spin coating and UFTM), dielectric interface engineering (OTS and CYTOP), and molecular orientation on the charge transport characteristics of poly(9,9-dioctylfluorene-alt-bithiophene) (F8T2)-based thin film transistors is systematically investigated. The UFTM process produces highly aligned polymer films, yielding pronounced optical anisotropy with a dichroic ratio of $\sim ~6.5$ at an optimized annealing temperature of $120~^{\circ }$ C. The optimized UFTM CYTOP $(\|)$ device exhibits a maximum field-effect mobility of $\sim 2.8\times 10^{-3}$ cm2 V−1 s−1, an on/off current ratio of $\sim ~4\times 10^{6}$ , improved threshold voltage, reduced subthreshold swing, excellent device-to-device reproducibility, while retaining $\sim ~80$ % of its initial mobility after 60 days under ambient conditions. These findings demonstrate a simple, low-cost, and scalable fabrication strategy for improving the electrical performance and operational reliability of F8T2-based OFETs.
期刊介绍:
The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.