Influence of Epitaxial Layer Thickness on the Holding Voltage Scalability of Bi-Directional SCR Devices

IF 2.7 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Ting Yang;Jie Zeng;Qidong Xie;Kyong Jin Hwang;Tupei Chen
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Abstract

This work investigates the impact of epitaxial layer (Epi) thickness on the holding voltage ( $V_{\mathrm {h}}$ ) scalability of bidirectional silicon-controlled rectifiers (BiSCRs) in 130 nm BCD technology. Experimental results show that increasing the base lengths ( $L_{\mathrm {nb}}$ / $L_{\mathrm {pb}}$ ) of parasitic BJTs leads to a linear increase in $V_{\mathrm {h}}$ under a thicker epitaxial process ( $1.5\times $ ), while having a negligible impact in a thinner epitaxial process ( $1\times $ ). Technology computer-aided design (TCAD) simulations attribute this disparity to Epi dependent current gain variations in the parasitic NPN and PNP BJTs: thinner Epi strengthens NPN gain, dominating conduction current and suppressing $V_{\mathrm {h}}$ control via lateral base-length adjustments, while thicker Epi weakens NPN gain, enabling effective $V_{\mathrm {h}}$ tuning. These findings demonstrate that Epi thickness critically determines the efficacy of geometric design strategies for BiSCR latch-up immunity, guiding optimized ESD protection in holding-voltage sensitive applications.
外延层厚度对双向可控硅器件保持电压可扩展性的影响
本文研究了130 nm BCD技术中外延层(Epi)厚度对双向硅控整流器(biscr)保持电压($V_{\ mathm {h}}$)可扩展性的影响。实验结果表明,增加寄生BJTs的基长($L_{\mathrm {nb}}$ / $L_{\mathrm {pb}}$),在较厚的外延工艺下($1.5\倍$),$V_{\mathrm {h}}$线性增加,而在较薄的外延工艺下($1\倍$),影响可以忽略。技术计算机辅助设计(TCAD)模拟将这种差异归因于寄生NPN和PNP BJTs中Epi依赖的电流增益变化:较薄的Epi增强了NPN增益,控制传导电流并通过横向基长调节抑制了$V_{\ mathm {h}}$控制,而较厚的Epi减弱了NPN增益,实现了有效的$V_{\ mathm {h}}$调谐。这些发现表明,Epi厚度关键地决定了BiSCR锁存抗扰度几何设计策略的有效性,指导了保持电压敏感应用中优化的ESD保护。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Transactions on Device and Materials Reliability
IEEE Transactions on Device and Materials Reliability 工程技术-工程:电子与电气
CiteScore
4.80
自引率
5.00%
发文量
71
审稿时长
6-12 weeks
期刊介绍: The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.
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