{"title":"Field- and Temperature-Induced Drift in Multi-Level Al-Doped HfO2 RRAM","authors":"Andrea Baroni;Jianan Wen;Eduardo Pérez;Keerthi Dorai Swamy Reddy;Max Uhlmann;Stefan Pechmann;Christian Wenger;Daniele Ielmini;Cristian Zambelli","doi":"10.1109/TDMR.2026.3700862","DOIUrl":null,"url":null,"abstract":"Drift of multi-level conductance states is a key reliability concern for resistive random access memory (RRAM) used in multi-level storage and in-memory computing applications. This work experimentally quantifies how repeated read operations and elevated-temperature storage reshape multiple conductive states in Al5%:HfO<sub>2</sub>-based RRAM cells. Systematic read-disturb and multi-temperature retention experiments are performed on one-transistor-one-resistor (1T1R) arrays, and their evolution is analyzed through intra-level transition matrices and a distance-weighted reshuffling factor <inline-formula> <tex-math>$F_{r}$ </tex-math></inline-formula> that jointly capture internal reshuffling dynamics beyond median and spread. Read-disturb exhibits a pronounced voltage dependence, with increasing reshuffling as <inline-formula> <tex-math>$V_{\\mathrm {RD}}$ </tex-math></inline-formula> rises, whereas retention shows a two-phase thermal evolution dominated by an early warm-up reshuffling followed by a slower isothermal regime. Comparing incremental step pulse and verify algorithm (ISPVA) and one-shot programming (OSP) under identical targets and read-stress conditions further shows that both algorithms experience redistribution, but with different directionality and level dependence. These results clarify the distinct statistical signatures of field- and temperature-induced drift and identify the programming algorithm, read-voltage budget, and warm-up handling as key design knobs to improve the number of reliable levels in multi-level RRAM arrays.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"26 3","pages":"871-879"},"PeriodicalIF":2.7000,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11552800","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Device and Materials Reliability","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11552800/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2026/6/5 0:00:00","PubModel":"Epub","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Drift of multi-level conductance states is a key reliability concern for resistive random access memory (RRAM) used in multi-level storage and in-memory computing applications. This work experimentally quantifies how repeated read operations and elevated-temperature storage reshape multiple conductive states in Al5%:HfO2-based RRAM cells. Systematic read-disturb and multi-temperature retention experiments are performed on one-transistor-one-resistor (1T1R) arrays, and their evolution is analyzed through intra-level transition matrices and a distance-weighted reshuffling factor $F_{r}$ that jointly capture internal reshuffling dynamics beyond median and spread. Read-disturb exhibits a pronounced voltage dependence, with increasing reshuffling as $V_{\mathrm {RD}}$ rises, whereas retention shows a two-phase thermal evolution dominated by an early warm-up reshuffling followed by a slower isothermal regime. Comparing incremental step pulse and verify algorithm (ISPVA) and one-shot programming (OSP) under identical targets and read-stress conditions further shows that both algorithms experience redistribution, but with different directionality and level dependence. These results clarify the distinct statistical signatures of field- and temperature-induced drift and identify the programming algorithm, read-voltage budget, and warm-up handling as key design knobs to improve the number of reliable levels in multi-level RRAM arrays.
期刊介绍:
The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.