PDA-Processed Hafnium-Based Capacitors With Ultrahigh-k (~81) Enabled by Capping Layers for Capacitive Memory Applications

IF 4.6 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Electron Device Letters Pub Date : 2026-10-01 Epub Date: 2026-08-20 DOI:10.1109/LED.2026.3725245
Xingcan Guo;Lei Wang;Kangli Xu;Chao Wu;Ruihong Yuan;Aolin Yuan;Hao Zhu;Qingqing Sun;David Wei Zhang;Jiajie Yu;Zhenhai Li;Lin Chen
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引用次数: 0

Abstract

HfO2/ZrO2-based capacitors typically require post-metallization annealing (PMA) to achieve ultrahigh- $k$ dielectric properties. Here we report a post-deposition annealing (PDA) process on H ${\mathrm{f}}_{{0}.{3}}$ ${\mathrm{Zr}}_{{0}.{7}}$ O2 capacitors with a mixed TiO2/Al2O3 capping layer. The uncapped HZO device exhibits a ferroelectric-like loop ( $k \sim 42$ at 0 V), whereas the capped device exhibits intermediate $k$ –V profile between FE-like and AFE-like responses, characterized by a pronounced near-zero-field high-k response with an ultrahigh-k value of ~81 at 0 V. The interfacial asymmetry also contributes non-destructive capacitive readout. The capacitive memory window (CMW $\varepsilon _{\text {r}}\text {)}$ of ~15 is maintained after $10^{{10}}$ write cycles at 2.4 V. A charge-based CMWQ of $1.08\mu $ C/cm2 persists after $10^{{9}}$ read cycles at 0.5 V. This work demonstrates a PDA-processed HZO capacitor that simultaneously delivers ultrahigh-k and non-destructive readout, achieving a maximum k value of ~81 at $550~^{\circ }$ C and retaining a $\kappa $ value of ~77 under a $400~^{\circ }$ C thermal budget.
采用封盖层实现超高k(~81)的pda加工铪基电容,用于电容存储应用
HfO2/ zro2基电容器通常需要金属化后退火(PMA)来实现超高$k$介电性能。本文报道了一种具有混合TiO2/Al2O3覆盖层的H ${\mathrm{f}}_{{0}.{3}}$${\mathrm{Zr}}_{{0}.{7}}$ O2电容器的沉积后退火(PDA)工艺。无封顶的HZO器件在0 V时表现出类似铁电的环路($k \sim 42$),而封顶器件则表现出介于fe和afe响应之间的$k$ -V分布,其特征是明显的近零场高k响应,在0 V时超高k值为81。界面不对称也有助于非破坏性电容读出。在2.4 V的$10^{{10}}$写入周期后,15的电容性记忆窗口(CMW $\varepsilon _{\text {r}}\text {)}$)保持不变。在0.5 V的$10^{{9}}$读取周期后,基于电荷的CMWQ为$1.08\mu $ C/cm2。这项工作展示了一种pda处理的HZO电容器,它同时提供超高k和非破坏性读数,在$550~^{\circ }$ C时达到最大k值81,在$400~^{\circ }$ C热预算下保持$\kappa $值77。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Electron Device Letters
IEEE Electron Device Letters 工程技术-工程:电子与电气
CiteScore
8.20
自引率
10.20%
发文量
551
审稿时长
1.4 months
期刊介绍: IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.
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