2.3-kV Vertical GaN Trench MOSFET With Variable Lateral Ion-Implanted Guard Rings

IF 4.6 2区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Electron Device Letters Pub Date : 2026-10-01 Epub Date: 2026-08-21 DOI:10.1109/LED.2026.3725710

Shihao Xu;Cui Yang;Wei Mao;Chao Liu;Ming Du;Ming Xiao;Yuanyuan Xie;Yu Duan;Yuchuan Ma;Changfa Sun;Dongguo Fan;Guoliang Peng;Kai Cheng;Maojun Wang;Li Zheng;Zhihong Liu;Jincheng Zhang;Yue Hao

{"title":"2.3-kV Vertical GaN Trench MOSFET With Variable Lateral Ion-Implanted Guard Rings","authors":"Shihao Xu;Cui Yang;Wei Mao;Chao Liu;Ming Du;Ming Xiao;Yuanyuan Xie;Yu Duan;Yuchuan Ma;Changfa Sun;Dongguo Fan;Guoliang Peng;Kai Cheng;Maojun Wang;Li Zheng;Zhihong Liu;Jincheng Zhang;Yue Hao","doi":"10.1109/LED.2026.3725710","DOIUrl":null,"url":null,"abstract":"This letter presents a vertical GaN trench MOSFET featuring Variable Lateral Ion-implanted Guard Rings (VLGR) formed in a partially thinned p-GaN region to engineer the edge electric field distribution. The proposed graded termination effectively mitigates electric field crowding, enabling a breakdown voltage (<italic>BV) of 2305 V—an approximately 2.7-fold improvement over the Ref-MOSFET (850 V). The fabricated device exhibits a threshold voltage (<inline-formula> <tex-math>${V}_{\\text {TH}}\\text {)}$ </tex-math></inline-formula> of 4.9 V, a specific on-resistance (<inline-formula> <tex-math>${R}_{\\text {on, sp}}\\text {)}$ </tex-math></inline-formula> of 7.2 m<inline-formula> <tex-math>$\\Omega \\cdot $ </tex-math></inline-formula>cm2, and an on/off current ratio of <inline-formula> <tex-math>$10^{{7}}$ </tex-math></inline-formula>, yielding a Baliga’s figure of merit (<italic>BFOM) of 738 MW/cm2. These results demonstrate an effective edge-termination strategy for extending the blocking capability of fully vertical GaN trench MOSFETs and suggest the potential of this structure for high-voltage power electronics applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 10","pages":"2087-2090"},"PeriodicalIF":4.6000,"publicationDate":"2026-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11661734/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2026/8/21 0:00:00","PubModel":"Epub","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

Abstract

This letter presents a vertical GaN trench MOSFET featuring Variable Lateral Ion-implanted Guard Rings (VLGR) formed in a partially thinned p-GaN region to engineer the edge electric field distribution. The proposed graded termination effectively mitigates electric field crowding, enabling a breakdown voltage (BV) of 2305 V—an approximately 2.7-fold improvement over the Ref-MOSFET (850 V). The fabricated device exhibits a threshold voltage (

${V}_{\text {TH}}\text {)}$

of 4.9 V, a specific on-resistance (

${R}_{\text {on, sp}}\text {)}$

of 7.2 m

$\Omega \cdot $

cm², and an on/off current ratio of

$10^{{7}}$

, yielding a Baliga’s figure of merit (BFOM) of 738 MW/cm². These results demonstrate an effective edge-termination strategy for extending the blocking capability of fully vertical GaN trench MOSFETs and suggest the potential of this structure for high-voltage power electronics applications.

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具有可变横向离子注入保护环的2.3 kv垂直GaN沟槽MOSFET

本文介绍了一种垂直GaN沟槽MOSFET，其特点是在部分变薄的p-GaN区域形成可变横向离子注入保护环（VLGR），以设计边缘电场分布。所提出的梯度端接有效地缓解了电场拥挤，使击穿电压（BV）达到2305 V，比reff - mosfet （850 V）提高了约2.7倍。所制备器件的阈值电压（${V}_{\text {TH}}\text{）}$为4.9 V，特定导通电阻（${R}_{\text {on, sp}}\text{）}$为7.2 m $\Omega \cdot $ cm2，通断电流比为$10^{{7}}$，产生的Baliga优值（bom）为738 MW/cm2。这些结果证明了一种有效的边缘终止策略，用于扩展全垂直GaN沟槽mosfet的阻塞能力，并表明该结构在高压电力电子应用中的潜力。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Electron Device Letters 工程技术-工程：电子与电气

CiteScore

8.20

自引率

10.20%

发文量

551

审稿时长

1.4 months

期刊介绍： IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.