{"title":"The Effect of Particle Pollution on the Temperature Rise of Assembled Printed Circuit Boards","authors":"Shengjie Liu;Hansheng Zhang;Fan Zhang;Yin Luo;Zhengyang Cui;Yilin Zhou","doi":"10.1109/TCPMT.2026.3666180","DOIUrl":null,"url":null,"abstract":"During the long-term operation of electronic devices, airborne dust particles are carried by airflow into the interior of the equipment, where they deposit on the surfaces of printed circuit boards (PCBs) and their assembled electronic components. This deposition obstructs normal heat dissipation, thereby increasing the risk of component failure. To investigate the effect of dust accumulation on the temperature rise of PCBs with integrated electronic components, this study proposes an innovative thermal modeling approach by treating deposited dust as an equivalent porous medium film. Gradient-density quartz particle deposition experiments combined with image recognition techniques were employed to determine the porosity of the dust layer. Based on thermal resistance theory analysis, the equivalent thermal conductivity of the film was derived. A finite element method (FEM)-based thermal simulation model was developed to systematically study the influence of dust coverage density on the surface temperature of PCBs assembled with various power levels of electronic components. The simulation results were experimentally validated through quartz particle deposition and temperature rise measurements. Experimental results indicate that the surface temperature of the circuit board increases significantly with higher particle coverage density. As the dust coverage density increases from dust-free condition to 1200 <inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>g/cm<sup>2</sup>, the predicted temperature rise of PCB-mounted chips is an average temperature rise of <inline-formula> <tex-math>$3.6~^{\\circ }$ </tex-math></inline-formula>C, showing excellent agreement with experimental measurements, with an overall deviation within −3%<inline-formula> <tex-math>$\\sim\\!+4$ </tex-math></inline-formula>%. Under the same coverage density, the temperature rise is nearly identical across electronic components with different power ratings. Finally, a theoretical temperature rise model for dust-covered components was established by fitting experimental data. This study demonstrates that modeling deposited particles as a porous medium film provides an efficient and accurate method for predicting the permissible dust coverage threshold of electronic products based on allowable temperature rise limits.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"16 9","pages":"2076-2088"},"PeriodicalIF":3.3000,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Components, Packaging and Manufacturing Technology","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11398392/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2026/2/18 0:00:00","PubModel":"Epub","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
During the long-term operation of electronic devices, airborne dust particles are carried by airflow into the interior of the equipment, where they deposit on the surfaces of printed circuit boards (PCBs) and their assembled electronic components. This deposition obstructs normal heat dissipation, thereby increasing the risk of component failure. To investigate the effect of dust accumulation on the temperature rise of PCBs with integrated electronic components, this study proposes an innovative thermal modeling approach by treating deposited dust as an equivalent porous medium film. Gradient-density quartz particle deposition experiments combined with image recognition techniques were employed to determine the porosity of the dust layer. Based on thermal resistance theory analysis, the equivalent thermal conductivity of the film was derived. A finite element method (FEM)-based thermal simulation model was developed to systematically study the influence of dust coverage density on the surface temperature of PCBs assembled with various power levels of electronic components. The simulation results were experimentally validated through quartz particle deposition and temperature rise measurements. Experimental results indicate that the surface temperature of the circuit board increases significantly with higher particle coverage density. As the dust coverage density increases from dust-free condition to 1200 $\mu $ g/cm2, the predicted temperature rise of PCB-mounted chips is an average temperature rise of $3.6~^{\circ }$ C, showing excellent agreement with experimental measurements, with an overall deviation within −3%$\sim\!+4$ %. Under the same coverage density, the temperature rise is nearly identical across electronic components with different power ratings. Finally, a theoretical temperature rise model for dust-covered components was established by fitting experimental data. This study demonstrates that modeling deposited particles as a porous medium film provides an efficient and accurate method for predicting the permissible dust coverage threshold of electronic products based on allowable temperature rise limits.
在电子设备的长期运行过程中,空气中的粉尘颗粒被气流带入设备内部,并沉积在印刷电路板(pcb)及其组装的电子元件的表面上。这种沉积阻碍了正常的散热,从而增加了组件故障的风险。为了研究粉尘堆积对集成电子元件pcb温升的影响,本研究提出了一种创新的热建模方法,将沉积的粉尘视为等效多孔介质膜。采用梯度密度石英颗粒沉积实验结合图像识别技术测定粉尘层孔隙度。在热阻理论分析的基础上,推导了薄膜的等效导热系数。建立了基于有限元法的热模拟模型,系统地研究了不同功率级电子元件组装pcb时,粉尘覆盖密度对pcb表面温度的影响。通过石英颗粒沉积和温升测量对模拟结果进行了验证。实验结果表明,随着颗粒覆盖密度的增加,线路板表面温度显著升高。当尘埃覆盖密度从无尘状态增加到1200 $\mu $ g/cm2时,pcb芯片的预测温升平均为$3.6~^{\circ }$ C,与实验测量结果非常吻合,总体偏差在−3以内% $\sim\!+4$ %. Under the same coverage density, the temperature rise is nearly identical across electronic components with different power ratings. Finally, a theoretical temperature rise model for dust-covered components was established by fitting experimental data. This study demonstrates that modeling deposited particles as a porous medium film provides an efficient and accurate method for predicting the permissible dust coverage threshold of electronic products based on allowable temperature rise limits.
期刊介绍:
IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.