{"title":"Substrate Attachment Voids and Their Impact on VSWR/Insertion Loss Performance for Low-Power Passive Circuits","authors":"Shivendra Tripathi;Anuj Sarode;Satendra Kumar;Deepak Kumar Sharma;Harimohan Singh;Santanu Sinha;Ishwarlal Prajapati","doi":"10.1109/TCPMT.2026.3724946","DOIUrl":null,"url":null,"abstract":"Substrate-attachment voids are critical defects in high-reliability RF assemblies, yet their quantitative impact on passive circuit performance is underreported. This study correlates Au<sub>80</sub>Sn<sub>20</sub> solder voiding with the simulated voltage standing wave ratio (VSWR) and measured insertion loss (IL) of miniature hybrid semi-monolithic microstrip lines and bandpass filters (BPF) across C through Ka band. Full-wave 3-D FEM (Ansys HFSS) and MoM planar EM (Keysight ADS Momentum) simulations were validated experimentally on microstrip-line and BPF test vehicles (TVs), respectively. Across void fractions from 4.3% to 44.9%, insertion loss showed no correlation with void content; the largest post-bake deviation observed was –0.33 dB, bounding any void-related effect below that level. A 144-h bake at <inline-formula> <tex-math>$125~^{\\circ } $ </tex-math></inline-formula>C confirmed electrical stability, with minor fluctuations tied to stress relaxation. The results support distinguishing active-device thermal paths from passive ground paths, avoiding unnecessary rework and reducing manufacturing costs.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"16 9","pages":"2140-2147"},"PeriodicalIF":3.3000,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Components, Packaging and Manufacturing Technology","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11658767/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2026/8/18 0:00:00","PubModel":"Epub","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Substrate-attachment voids are critical defects in high-reliability RF assemblies, yet their quantitative impact on passive circuit performance is underreported. This study correlates Au80Sn20 solder voiding with the simulated voltage standing wave ratio (VSWR) and measured insertion loss (IL) of miniature hybrid semi-monolithic microstrip lines and bandpass filters (BPF) across C through Ka band. Full-wave 3-D FEM (Ansys HFSS) and MoM planar EM (Keysight ADS Momentum) simulations were validated experimentally on microstrip-line and BPF test vehicles (TVs), respectively. Across void fractions from 4.3% to 44.9%, insertion loss showed no correlation with void content; the largest post-bake deviation observed was –0.33 dB, bounding any void-related effect below that level. A 144-h bake at $125~^{\circ } $ C confirmed electrical stability, with minor fluctuations tied to stress relaxation. The results support distinguishing active-device thermal paths from passive ground paths, avoiding unnecessary rework and reducing manufacturing costs.
期刊介绍:
IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.