Substrate Attachment Voids and Their Impact on VSWR/Insertion Loss Performance for Low-Power Passive Circuits

IF 3.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Shivendra Tripathi;Anuj Sarode;Satendra Kumar;Deepak Kumar Sharma;Harimohan Singh;Santanu Sinha;Ishwarlal Prajapati
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引用次数: 0

Abstract

Substrate-attachment voids are critical defects in high-reliability RF assemblies, yet their quantitative impact on passive circuit performance is underreported. This study correlates Au80Sn20 solder voiding with the simulated voltage standing wave ratio (VSWR) and measured insertion loss (IL) of miniature hybrid semi-monolithic microstrip lines and bandpass filters (BPF) across C through Ka band. Full-wave 3-D FEM (Ansys HFSS) and MoM planar EM (Keysight ADS Momentum) simulations were validated experimentally on microstrip-line and BPF test vehicles (TVs), respectively. Across void fractions from 4.3% to 44.9%, insertion loss showed no correlation with void content; the largest post-bake deviation observed was –0.33 dB, bounding any void-related effect below that level. A 144-h bake at $125~^{\circ } $ C confirmed electrical stability, with minor fluctuations tied to stress relaxation. The results support distinguishing active-device thermal paths from passive ground paths, avoiding unnecessary rework and reducing manufacturing costs.
低功率无源电路中衬底附着空隙及其对驻波比/插入损耗性能的影响
衬底附着空洞是高可靠性射频组件的关键缺陷,但其对无源电路性能的定量影响被低估。本研究将Au80Sn20的焊料空化与C到Ka波段的微型混合半单片微带线和带通滤波器的模拟电压驻波比(VSWR)和测量插入损耗(IL)联系起来。在微带线和BPF试验车上分别对全波三维有限元(Ansys HFSS)和MoM平面电磁(Keysight ADS Momentum)仿真进行了实验验证。在4.3% ~ 44.9%空隙率范围内,插入损失与空隙含量无相关性;观察到的最大烘烤后偏差为-0.33 dB,将任何低于该水平的空洞相关影响结合起来。在125~ {\circ} $ C的温度下烘烤144小时,证实了电稳定性,有轻微的波动与应力松弛有关。结果支持区分有源器件热路径和无源接地路径,避免不必要的返工并降低制造成本。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Transactions on Components, Packaging and Manufacturing Technology
IEEE Transactions on Components, Packaging and Manufacturing Technology ENGINEERING, MANUFACTURING-ENGINEERING, ELECTRICAL & ELECTRONIC
CiteScore
4.70
自引率
13.60%
发文量
203
审稿时长
3 months
期刊介绍: IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.
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