{"title":"Predictive Modeling of TCV-Cu Protrusion Under Thermal Cycling","authors":"Heran Zhao;Tao He;Dan Li;Lihua Cao;Shizhao Wang;Mingxiang Chen","doi":"10.1109/TCPMT.2026.3654515","DOIUrl":null,"url":null,"abstract":"Through-ceramic-via copper (TCV-Cu) in direct-plated-copper (DPC) substrates can protrude during thermal cycling, threatening package planarity and interconnect reliability. This work develops a coupled thermo-mechanical framework that links transient temperature histories to out-of-plane deformation via a calibrated creep law for electroplated Cu. A 3-D finite-element model resolves the via shoulder and Cu/ceramic corner while enforcing realistic interface constraints and elastic heterogeneity. Creep parameters are identified by inverse optimization against 32 ramp-dwell thermal profiles using weighted least squares reflecting profilometer repeatability and registration uncertainty. The residual plots show no systematic bias, and leave-one-profile-out cross-validation confirms predictive robustness. Mechanistic analysis reveals stress-creep synergy during heating produces CEEQ pulses and peak protrusion, whereas high-temperature dwells and slow cooling govern residual buildup. A persistent ring-like stress hotspot forms at the via shoulder and Cu/ceramic interface corner. Sensitivity studies indicate faster ramps increase peak but reduce residual protrusion, while longer dwells amplify residuals; array pitch and modulus contrast modulate hotspot intensity. The results yield actionable process-window guidance for ramp rate, dwell duration, and layout, providing a compact, data-validated predictor for TCV-Cu protrusion in advanced packaging.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"16 9","pages":"2068-2075"},"PeriodicalIF":3.3000,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Components, Packaging and Manufacturing Technology","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11354521/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2026/1/15 0:00:00","PubModel":"Epub","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Through-ceramic-via copper (TCV-Cu) in direct-plated-copper (DPC) substrates can protrude during thermal cycling, threatening package planarity and interconnect reliability. This work develops a coupled thermo-mechanical framework that links transient temperature histories to out-of-plane deformation via a calibrated creep law for electroplated Cu. A 3-D finite-element model resolves the via shoulder and Cu/ceramic corner while enforcing realistic interface constraints and elastic heterogeneity. Creep parameters are identified by inverse optimization against 32 ramp-dwell thermal profiles using weighted least squares reflecting profilometer repeatability and registration uncertainty. The residual plots show no systematic bias, and leave-one-profile-out cross-validation confirms predictive robustness. Mechanistic analysis reveals stress-creep synergy during heating produces CEEQ pulses and peak protrusion, whereas high-temperature dwells and slow cooling govern residual buildup. A persistent ring-like stress hotspot forms at the via shoulder and Cu/ceramic interface corner. Sensitivity studies indicate faster ramps increase peak but reduce residual protrusion, while longer dwells amplify residuals; array pitch and modulus contrast modulate hotspot intensity. The results yield actionable process-window guidance for ramp rate, dwell duration, and layout, providing a compact, data-validated predictor for TCV-Cu protrusion in advanced packaging.
期刊介绍:
IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.