Device Variability and Bias-Stress Stability in Fluorine Plasma-Engineered IGZTO Thin-Film Transistors

Abstract

Reliability of amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) is critical for monolithic 3-D integration and memory applications. Although fluorine incorporation is an effective approach to improve the stability of AOS TFTs, its impacts on device variability and bias-stress stability have not been fully understood. In this work, we systematically investigate the effects of CF4 plasma treatment conditions, including treatment time and chamber pressure, on indium–gallium–zinc–tin–oxide (IGZTO) TFTs. Statistical analysis over multiple devices under each condition reveals that controlled fluorine incorporation suppresses oxygen vacancy and hydrogen-related defects and modulates the electronic structure, leading to tunable threshold voltage and field-effect mobility. However, prolonged plasma treatment induces damage to the channel and channel/gate-dielectric stack, resulting in degraded subthreshold swing, enlarged parameter dispersion, and aggravated bias-stress instability. By increasing the chamber pressure, ion bombardment energy is reduced while sufficient fluorine incorporation is preserved, enabling simultaneous improvement in device variability and bias-stress stability. Under the optimized treatment condition, the IGZTO TFTs exhibit a near-ideal subthreshold swing of ~62 mV/dec, a positive threshold voltage of ~0.32 V, and small threshold voltage shifts of +3.9 mV under +3 MV/cm and −4.8 mV under −3 MV/cm after 1000 s. These results clarify the tradeoff between fluorine passivation and plasma-induced damage and provide practical guidelines for fluorine plasma engineering of highly reliable AOS TFTs.