Design and Analysis of Nanosheet FET With Asymmetric Dual-κ Inner Spacer in DC and RF Perspective

Abstract

In this work, we propose a nanosheet field effect transistor (NSFET) with an asymmetric dual- $\kappa $ inner spacer structure ( ${\mathrm{NSFET}}_{\text {ADIS}}$ ) to improve DC/RF performance. To rigorously evaluate its benefits, we benchmark NSFETADIS against two References: NSFET with a conventional fully nitride inner spacer ( ${\mathrm{NSFET}}_{\text {Conv}}$ ) and NSFET with a symmetric dual- $\kappa $ inner spacer ( ${\mathrm{NSFET}}_{\text {SDIS}}$ ), utilizing 3-D technology computer-aided design (TCAD) simulations. Consequently, the high- $\kappa $ inner spacer strengthens the gate fringe field, lowering the source-channel barrier and increasing transconductance. Moreover, by isolating the low- $\kappa $ inner spacer from the channel extension and the inner gate, we alleviate its impact on the barrier lowering while simultaneously mitigating the increase in total gate capacitance ( ${C}_{\text {gg}}$ ) associated with the high- $\kappa $ dielectric. Furthermore, we extract intrinsic delay, off current ( ${I}_{\text {off}}$ ), cutoff frequency ( ${F}_{\text {t}}$ ), and maximum oscillation frequency ( ${F}_{\max }$ ) with respect to the high- $\kappa $ inner spacer thickness ( ${T}_{\text {IS, {h}}\kappa }$ ) and its material. In addition, the optimized NSFETSDIS and NSFETADIS were evaluated in terms of high-frequency switching operation, and their RF performance was further assessed by comparing the gain-bandwidth product (GBW) and voltage gain ( ${A}_{\text {v}}$ ). As a result, compared with NSFETConv and NSFETADIS achieves an 11.18% reduction in intrinsic delay and a 19.21% increase in switching frequency under the same ${I}_{\text {off}}$ and active power conditions. Regarding RF performance, ${F}_{\text {t}},{F}_{\max }$ , GBW, and ${A}_{\text {v}}$ are enhanced by 10.8%, 14.99%, 14.35%, and 10.32%, respectively.