Toward Understanding Threshold Voltage Shift Induced by Gate-to-Sinker Spacing Scaling in 12 V n-LDMOSFET

Abstract

This work presents a systematic investigation of the impact of gate-to-sinker Lgsink scaling on threshold voltage Vth stability of n-type lateral double-diffused MOS (n-LDMOS). The effects of Lgsink were examined experimentally. A unique dependence of threshold voltage on gate-to-sinker spacing was identified, originating from boron diffusion of the P++ sinker into the channel and drain LDD regions during high-temperature drive-in. This mechanism was validated by secondary ion mass spectrometry (SIMS) profiling, which directly demonstrated boron penetration beneath the channel. The increased channel doping accounts for the observed rise in threshold voltage and reduction in drive current. These findings highlight the necessity of co-optimizing geometric scaling and diffusion control to achieve better control of Vth in advanced lateral double-diffused metal-oxide-semiconductor (LDMOS) technologies.